# US 2022/0285255 A1 · Wiring board with embedded interposer substrate and method of fabricating the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2022/0285255 A1 - Document ID: US20220285255A1 - Status: Published application - Kind: A1 - Application number: 17/232,109 - Filed: 2021-04-15 - Published: 2022-09-08 - Earliest claimed: 2021-03-08 - Assignees: Unimicron Technology Corp. - Applicants: Unimicron Technology Corp. - Inventors: Yan-Jia Peng; Kuo-Ching Chen; Pu-Ju Lin - Web page: https://patentgrep.com/patent/US20220285255A1 ## CPC - H10W 70/685: comprising multiple insulating layers - H05K 3/4694: {Partitioned multilayer circuits having adjacent regions with different properties, e.g. by adding or inserting locally circuit layers having a higher circuit density (H05K3/4691 takes precedence)} - H10W 20/01: {Manufacture or treatment} - H10W 20/43: Layouts of interconnections - H10W 20/4421: {the principal metal being copper} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 76/40: Fillings or auxiliary members in containers, e.g. centering rings (fillings or auxiliary members for thermal protection or control in containers or encapsulations H10W40/70) - H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs} - H10W 95/00: Packaging processes not covered by the other groups of this subclass - H05K 3/4644: {by building the multilayer layer by layer, i.e. build-up multilayer circuits (making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602)} - H10W 70/68: Shapes or dispositions thereof - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract A method of fabricating a wiring board with an embedded interposer substrate includes preparing a main substrate, forming a recess on the main substrate, placing an interposer substrate into the recess, electrically connecting a second pad of the interposer substrate and the first pad of the main substrate, and filling a gap between the interposer substrate and the main substrate with an underfill. The recess exposes a first pad of the main substrate. A second pad of interposer substrate and the first pad of the main substrate are made of the same metal and formed in different outer surface profiles. The underfill entirely touches side surfaces and a bottom surface of the interposer substrate. ## Claims ### Claim 1 A method of fabricating a wiring board with an embedded interposer substrate, comprising: preparing a main substrate; forming a recess on the main substrate, wherein a first pad of the main substrate is exposed in the recess; placing an interposer substrate into the recess, wherein a second pad of the interposer substrate and the first pad are made of the same metal and formed in different outer surface profiles; electrically connecting the second pad of the interposer substrate and the first pad of the main substrate; and filling a gap between the interposer substrate and the main substrate with an underfill, wherein the underfill entirely touches side surfaces and a bottom surface of the interposer substrate. ### Claim 2 (depends on 1) The method of claim 1, wherein the first pad is made of copper. ### Claim 3 (depends on 1) The method of claim 1, wherein at least one of the first pad and the second pad comprises an undulating outer surface profile. ### Claim 4 (depends on 3) The method of claim 3, wherein one of the first pad and the second pad comprises an outer surface profile with a bump, and the other of the first pad and the second pad comprises a flat outer surface profile. ### Claim 5 (depends on 3) The method of claim 3, wherein one of the first pad and the second pad comprises a recessed outer surface profile, and the other of the first pad and the second pad comprises a flat outer surface profile. ### Claim 6 (depends on 3) The method of claim 3, wherein one of the first pad and the second pad comprises an outer surface profile with a plurality of bumps, and the other of the first pad and the second pad comprises a flat outer surface profile. ### Claim 7 (depends on 3) The method of claim 3, wherein one of the first pad and the second pad comprises a recessed outer profile, wherein the other of the first pad and the second pad is configured within the recessed outer profile. ### Claim 8 (depends on 3) The method of claim 3, wherein one of the first pad and the second pad comprises a recessed outer surface profile, and the other of the first pad and the second pad comprises an outer surface profile with a plurality of bumps, wherein a plurality of top edges of the recessed outer surface profile face toward the plurality of bumps. ### Claim 9 (depends on 1) The method of claim 1, wherein electrically connecting the second pad of the interposer substrate and the first pad of the main substrate comprising operating a thermal compressive copper bonding process. ### Claim 10 (depends on 9) The method of claim 9, wherein part of an outer surface of the first pad and part of an outer surface of the second pad touch each other before operating the thermal compressive copper bonding process. ### Claim 11 (depends on 10) The method of claim 10, wherein a bonding temperature used in the thermal compressive copper bonding process is between about 60° C. and about 160° C. ### Claim 12 (depends on 1) The method of claim 1, wherein the underfill laterally connects side surfaces of the interposer substrate and the main substrate. ### Claim 13 (depends on 1) The method of claim 1, wherein a height of the underfill substantially equals to a thickness of the interposer substrate. ### Claim 14 (depends on 1) The method of claim 1, wherein a curing process is performed on the underfill after filling the gap between the interposer substrate and the main substrate with the underfill. ### Claim 15 A wiring board with an embedded interposer substrate, comprising: a main substrate, comprising a recess formed on the main substrate; and an interposer substrate placed into the recess, comprising: a bottom surface; and a plurality of side surfaces; a conductive bonding element between the main substrate and the interposer substrate, wherein the conductive bonding element electrically connects the main substrate and the interposer substrate; and an underfill between the main substrate and the interposer substrate, wherein the underfill entirely touches side surfaces and a bottom surface of the interposer substrate. ### Claim 16 (depends on 15) The wiring board of claim 15, wherein the conductive bonding element is made of copper. ### Claim 17 (depends on 15) The wiring board of claim 15, wherein the conductive bonding element is a homogeneous structure without voids inside. ### Claim 18 (depends on 15) The wiring board of claim 15, wherein the underfill laterally connects side surfaces of the interposer substrate and the main substrate. ### Claim 19 (depends on 15) The wiring board of claim 15, wherein a height of the underfill substantially equals to a thickness of the interposer substrate. ### Claim 20 (depends on 15) The wiring board of claim 15, wherein a coefficient of thermal expansion (CTE) of the main substrate is different from one of a CTE of the interposer substrate and a CTE of the underfill.