# US 2022/0285205 A1 · SELECTIVE ETCHING PROCESS FOR SiGe AND DOPED EPITAXIAL SILICON

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- Number: US 2022/0285205 A1
- Document ID: US20220285205A1
- Status: Published application
- Kind: A1
- Application number: 17/389,977
- Filed: 2021-07-30
- Published: 2022-09-08
- Earliest claimed: 2021-03-05
- Assignees: Qorvo US, Inc.
- Applicants: Qorvo US, Inc.
- Inventors: Krishna Chetry; Ganesan Radhakrishnan
- Web page: https://patentgrep.com/patent/US20220285205A1

## CPC

- H10W 74/137: {the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence)}
- H10D 30/00: Field-effect transistors [FET] (insulated-gate bipolar transistors H10D12/00)
- H10D 84/80: characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs (H10D84/40 takes precedence)
- H10W 10/181: {Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers}
- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W 20/481: {on the rear surfaces of the wafers or substrates}
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 74/129: {forming a chip-scale package [CSP]}
- H10P 50/242: {of Group IV materials}
- H10P 50/283: {by chemical means}
- H10P 52/402: {of semiconductor materials}
- H10P 58/00: Singulating wafers or substrates into multiple chips, i.e. dicing
- H10P 72/74: {using temporarily an auxiliary support}
- H10P 72/7416: {used during dicing or grinding}
- H10P 72/7424: {used as a support during the manufacture of self-supporting substrates}
- H10P 72/743: {used as a support during manufacture of interconnect decals or build up layers}
- H10P 72/7434: {used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate}
- H10P 90/1906: {Preparing SOI wafers}
- H10P 90/1922: {using silicon etch back techniques, e.g. BESOI or ELTRAN}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W 20/233: {parallel to the active surface, e.g. horizontal traces in trenches in the surface of the wafer}
- H10W 40/233: {attached to chips}
- H10W 40/251: {Organics}
- H10W 40/254: {Diamond}
- H10W 40/257: {having a heterogeneous or anisotropic structure, e.g. powder or fibres in a matrix, wire mesh or porous structures (H10W40/254, H10W40/251 take precedence)}
- H10W 40/778: {in encapsulations}
- H10W 42/101: {protecting against moisture, e.g. getters (fillers in containers for absorbing or reacting with moisture or other undesired substances H10W76/48)}
- H10W 70/655: Fan-out layouts
- H10W 70/66: Conductive materials thereof
- H10W 72/0198: {batch processes}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/922: {Bond pads being integral with underlying chip-level interconnections}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

The present disclosure relates to a fabricating procedure of a radio frequency device, in which a precursor wafer including active layers, SiGe layers, and a silicon handle substrate is firstly provided. Each active layer is formed from doped epitaxial silicon and underneath a corresponding SiGe layer. The silicon handle substrate is over each SiGe layer. Next, the silicon handle substrate is removed completely, and the SiGe layer is removed completely. An etch passivation film is then formed over each active layer. Herein, removing each SiGe layer and forming the etch passivation film over each active layer utilize a same reactive chemistry combination, which reacts differently to the SiGe layer and the active layer. The reactive chemistry combination is capable of producing a variable performance, which is an etching performance of the SiGe layer or a forming performance of the etch passivation film over the active layer.

## Claims

### Claim 1

A method comprising:
providing a precursor wafer having a plurality of device regions, wherein:
each of the plurality of device regions includes an active layer that is fabricated from doped epitaxial silicon;
an interfacial layer formed of silicon germanium (SiGe) is directly over the active layer of each of the plurality of device regions; and
a silicon handle substrate is directly over each interfacial layer;
removing the silicon handle substrate completely;
removing the interfacial layer completely to expose the active layer; and
forming an etch passivation film directly over the active layer of each of the plurality of device regions, wherein:
both removing the interfacial layer and forming the etch passivation film utilize a same reactive chemistry combination; and
the reactive chemistry combination is chosen in a manner that the reactive chemistry combination reacts differently to the interfacial layer and the active layer, wherein the reactive chemistry combination is capable of producing a variable net performance, which is an etching performance of the interfacial layer or a forming performance of the etch passivation film over the active layer.

### Claim 2 (depends on 1)

The method of claim 1 wherein the interfacial layer is removed by a dry etching process.

### Claim 3 (depends on 2)

The method of claim 2 wherein:
the reactive chemistry combination is a mixed gas flow of sulfur hexafluoride (SF6), nitrogen (N2), and boron chloride (BCl3), such that reactive radicals fluorine (F), chlorine (Cl), boron nitride (BN), and boron chloride (BClx) are provided in removing the interfacial layer and forming the etch passivation film;
the F and Cl radicals are capable of etching doped epitaxial silicon and SiGe, and the BN and BClx radicals are capable of forming a passivation material on doped epitaxial silicon and SiGe, wherein a competition between an etching rate of the F and Cl radicals and a forming rate of the BN and BClx radicals determines the net performance;
for the interfacial layer, the etching rate of the F and Cl radicals is faster than the forming rate of the BN and BClx, such that the net performance is the etching performance leading to the removal of the interfacial layer; and
for the active layer, the etching rate of the F and Cl radicals is slower than the forming rate of the BN and BClx, such that the net performance is the forming performance of the etch passivation film over the active layer.

### Claim 4 (depends on 3)

The method of claim 3 wherein in the mixed gas flow, SF6 has a flow rate between 5 sccm and 60 sccm, N2 has a flow rate between 20 sccm and 90 sccm, and BCl3 has a flow rate between 20 sccm and 90 sccm.

### Claim 5 (depends on 4)

The method of claim 4 wherein the flow rate of SF6, the flow rate of N2, and the flow rate of BCl3 are constant in removing the interfacial layer and forming the etch passivation film.

### Claim 6 (depends on 3)

The method of claim 3 wherein an oxygen (O2) gas flow and an argon (Ar) gas flow are used with the reactive chemistry combination in removing the interfacial layer and forming the etch passivation film.

### Claim 7 (depends on 6)

The method of claim 6 wherein the O2 gas flow has a flow rate between 50 sccm and 400 sccm, and the Ar gas flow has a flow rate between 10 sccm and 60 sccm.

### Claim 8 (depends on 1)

The method of claim 1 further comprising, before the removal of the interfacial layer, a breakthrough etching step to remove a surface oxide layer to expose the interfacial layer, wherein the surface oxide layer is formed after the removal of the silicon handle substrate directly on the interfacial layer.

### Claim 9 (depends on 8)

The method of claim 8 wherein the surface oxide layer is removed by a dry etching process.

### Claim 10 (depends on 9)

The method of claim 9 wherein the surface oxide layer is removed using a SF6 gas flow.

### Claim 11 (depends on 10)

The method of claim 10 wherein during the breakthrough etching step, the SF6 gas flow has a flow rate between 5 sccm and 40 sccm.

### Claim 12 (depends on 10)

The method of claim 10 wherein an O2 gas flow and an Ar gas flow are used with the SF6 gas flow in the breakthrough etching step.

### Claim 13 (depends on 12)

The method of claim 12 wherein the O2 gas flow has a flow rate between 50 sccm and 400 sccm, and the Ar gas flow has a flow rate between 10 sccm and 60 sccm.

### Claim 14 (depends on 10)

The method of claim 10 wherein a duration of the breakthrough etching step is pre-calibrated.

### Claim 15 (depends on 8)

The method of claim 8 wherein the surface oxide layer and the interfacial layer are removed by a same dry etching process.

### Claim 16 (depends on 15)

The method of claim 15 wherein:
the surface oxide layer is removed using a SF6 gas flow;
the reactive chemistry combination is a mixed gas flow of SF6, N2, and BCl3, such that reactive radicals F, Cl, BN, and BClx are provided in removing the interfacial layer and forming the etch passivation film;
the F and Cl radicals are capable of etching doped epitaxial silicon and SiGe, and the BN and BClx radicals are capable of forming a passivation material on doped epitaxial silicon and SiGe, wherein a competition between an etching rate of the F and Cl radicals and a forming rate of the BN and BClx radicals determines the net performance;
for the interfacial layer, the etching rate of the F and Cl radicals is faster than the forming rate of the BN and BClx, such that the net performance is the etching performance leading to the removal of the interfacial layer; and
for the active layer, the etching rate of the F and Cl radicals is slower than the forming rate of the BN and BClx, such that the net performance is the forming performance of the etch passivation film over the active layer.

### Claim 17 (depends on 16)

The method of claim 16 wherein:
during the breakthrough etching step, the SF6 gas flow has a flow rate between 5 sccm and 40 sccm; and
during removing the interfacial layer and forming the etch passivation film, in the mixed gas flow, SF6 has a flow rate between 5 sccm and 60 sccm, N2 has a flow rate between 20 sccm and 90 sccm, and BCl3 has a flow rate between 20 sccm and 90 sccm.

### Claim 18 (depends on 17)

The method of claim 17 wherein the flow rate of SF6, the flow rate of N2, and the flow rate of BCl3 are constant in removing the interfacial layer and forming the etch passivation film.

### Claim 19 (depends on 16)

The method of claim 16 wherein an O2 gas flow and an Ar gas flow are used in removing the surface oxide layer, removing the interfacial layer, and forming the etch passivation film.

### Claim 20 (depends on 19)

The method of claim 19 wherein the O2 gas flow has a flow rate between 50 sccm and 400 sccm, and the Ar gas flow has a flow rate between 10 sccm and 60 sccm.