# US 2022/0276392 A1 · Method for Synchronizing An Encoded Signal, Receiver, Computer Program Product and Non-volatile Storage Medium > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2022/0276392 A1 - Document ID: US20220276392A1 - Status: Published application - Kind: A1 - Application number: 17/668,530 - Filed: 2022-02-10 - Published: 2022-09-01 - Earliest claimed: 2021-02-12 - Assignees: u-blox AG - Applicants: u-blox AG - Inventors: Oliver With - Web page: https://patentgrep.com/patent/US20220276392A1 ## CPC - G01S 19/243: {Demodulation of navigation message} - H04B 1/7073: Synchronisation aspects - G01S 19/24: Acquisition or tracking {or demodulation} of signals transmitted by the system {(synchronisation aspects of direct sequence spread spectrum modulation H04B1/7073)} - G01S 19/25: involving aiding data received from a cooperating element, e.g. assisted GPS - H04B 2201/70701: featuring pilot assisted reception - H04B 2201/70715: with application-specific features - G01S: RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES - H04B: TRANSMISSION ## Abstract The present disclosure relates to a method for synchronizing an encoded signal, in particular a GNSS signal. The method comprises receiving an input signal comprising a first signal component and a second signal component, wherein a sequence of N bits of the first signal component and a sequence of M bits of the second signal component are known a priori. The method further comprises determining a first logical sequence based on a plurality of cross-product operations formed between pairs of vectors obtained from a plurality of received symbols of the first signal component and the second signal component of the received input signal. The method also comprises identifying a position of a second logical sequence within the first logical sequence, the second logical sequence resulting from logical operations performed between at least a part of the known sequence of N bits of the first signal component and a corresponding number of bits of the known sequence of M bits of the second signal component in order to synchronize to a frame of the received input signal. ## Claims ### Claim 1 A method for synchronizing an encoded signal, the method comprising: receiving an input signal comprising a first signal component and a second signal component, wherein a sequence of N bits of the first signal component and a sequence of M bits of the second signal component are known a priori; determining a first logical sequence based on a plurality of cross-product operations formed between pairs of vectors obtained from a plurality of received symbols of the first signal component and the second signal component of the received input signal; and identifying a position of a second logical sequence within the first logical sequence, the second logical sequence resulting from logical operations performed between at least a part of the known sequence of N bits of the first signal component and a corresponding number of bits of the known sequence of M bits of the second signal component, in order to synchronize to a frame of the received input signal. ### Claim 2 (depends on 1) The method according to claim 1, wherein the cross-product operations formed between the pairs of vectors obtained from the received symbols of the first signal component and the second signal component of the received input signal are performed for every symbol of the received input signal. ### Claim 3 (depends on 1) The method according to claim 1, wherein the second signal component and the first signal component of the received input signal are received 80 degrees to 100 degrees out of phase from each other. ### Claim 4 (depends on 1) The method according to claim 1, wherein the bits and/or frames of the first signal component and the second signal component are aligned in time. ### Claim 5 (depends on 1) The method according to claim 1, wherein determining the first logical sequence comprises allocating a respective logical value to each result of the plurality of cross-product operations. ### Claim 6 (depends on 1) The method according to claim 1, wherein the identifying the position of the second logical sequence within the first logical sequence is performed using a criterion that defines a maximum number of values by which the first logical sequence is allowed to differ from the second logical sequence. ### Claim 7 (depends on 1) The method according to claim 1, wherein, after or during the first logical sequence is determined, the first logical sequence is stored, and wherein in the step of identifying the position of the second logical sequence within the first logical sequence, the stored first logical sequence is compared to the second logical sequence. ### Claim 8 (depends on 1) The method according to claim 1, wherein the logical operations between the at least a part of the known sequence of N bits of the first signal component and a corresponding number of bits of the known sequence of M bits of the second signal component corresponds to a bit-wise exclusive-OR operation of respective logical values of those bits. ### Claim 9 (depends on 1) The method according to claim 1, wherein the received input signal is a global navigation satellite system (GNSS) signal that comprises a primary code and secondary code and, before the first logical sequence is determined, the primary code is wiped off. ### Claim 10 (depends on 1) The method according to claim 1, wherein the received input signal is a global navigation satellite system (GNSS) signal and the N known bits of the first signal component are a preamble of the first signal component and the second signal component consists of the M known bits of the second signal component comprising a secondary code. ### Claim 11 (depends on 1) The method according to claim 1, wherein the first signal component is a data component and the second signal component is a pilot component of the received input signal. ### Claim 12 A receiver comprising a receiving unit and a processing unit, wherein the receiving unit is configured to: receive an input signal comprising a first signal component and a second signal component, wherein a sequence of N bits of the first signal component and a sequence of M bits of the second signal component are known a priori; and the processing unit is configured to: determine a first logical sequence based on a plurality of cross-product operations formed between pairs of vectors obtained from a plurality of received symbols of the first signal component and the second signal component of the received input signal; and identify a position of a second logical sequence within the first logical sequence, the second logical sequence resulting from logical operations performed between at least a part of the known sequence of N bits of the first signal component and a corresponding number of bits of the known sequence of M bits of the second signal component in order to synchronize to a frame of the received input signal. ### Claim 13 (depends on 12) The receiver according to claim 12, further comprising a storage unit, wherein the processing unit is further configured to store the first logical sequence in the storage unit, and, to identify a position of the second logical sequence within the first logical sequence by comparing the stored first logical sequence to the second logical sequence. ### Claim 14 One or more tangible, non-transitory, computer-readable media storing instructions that, when executed by one or more processors, cause the one or more processors to perform operations, in response to receiving an input signal comprising a first signal component and a second signal component, wherein a sequence of N bits of the first signal component and a sequence of M bits of the second signal component are known a priori, the operations comprising: determining a first logical sequence based on a plurality of cross-product operations formed between pairs of vectors obtained from a plurality of received symbols of the first signal component and the second signal component of the received input signal; and identifying a position of a second logical sequence within the first logical sequence, the second logical sequence resulting from logical operations performed between at least a part of the known sequence of N bits of the first signal component and a corresponding number of bits of the known sequence of M bits of the second signal component, in order to synchronize to a frame of the received input signal. ### Claim 15 (canceled)