Sense amplifier circuit, memory device, and operation method thereof

A sense amplifier circuit, comprising:

• an amplification circuit, comprising:
• a first inverting amplifier connected to a first bitline;
• and
• a second inverting amplifier connected to a second bitline, wherein the amplification circuit is configured to amplify a voltage signal applied between the first bitline and the second bitline;
• and
• a compensation circuit coupled to the amplification circuit and configured to compensate an input-referred offset voltage of the amplification circuit, wherein the compensation circuit is configured to conduct a charging operation to charge at least one of the first bitline and the second bitline,
• and wherein, at an end of the charging operation, a voltage difference between near-ends of the first bitline and the second bitline is larger than the input-referred offset voltage of the amplification circuit.

A sense amplifier circuit, comprising:

• an amplification circuit, comprising:
• a first inverting amplifier connected to a first bitline;
• and
• a second inverting amplifier connected to a second bitline, wherein the amplification circuit is configured to amplify a voltage signal applied between the first bitline and the second bitline during a signal amplification stage;
• and
• a compensation circuit coupled to the first bitline, the second bitline, and the amplification circuit, and configured to compensate an input-referred offset voltage of the amplification circuit during an offset compensation stage,
• wherein at least one of the first bitline and the second bitline is connected, through the compensation circuit, to one output of the first inverting amplifier and the second inverting amplifier during the signal amplification stage, and the at least one of the first bitline and the second bitline is connected to another output of the first inverting amplifier and the second inverting amplifier during the offset compensation stage.

A sense amplifier circuit, comprising:

• an amplification circuit, comprising:
• a first inverting amplifier connected to a first bitline;
• and
• a second inverting amplifier connected to a second bitline, wherein the amplification circuit is configured to amplify a voltage signal applied between the first bitline and the second bitline;
• and
• a compensation circuit coupled to the amplification circuit, and configured to compensate an input-referred offset voltage of the amplification circuit during an offset compensation stage, wherein a gain of the sense amplifier circuit is larger than one during the offset compensation stage.

A sense amplifier circuit, comprising:

• an amplification circuit, comprising:
• a first inverting amplifier connected to a first bitline;
• and
• a second inverting amplifier connected to a second bitline, wherein the amplification circuit is configured to amplify a voltage signal applied between the first bitline and the second bitline during a signal amplification stage;
• and
• a compensation circuit coupled to the amplification circuit, and configured to compensate an input-referred offset voltage of the amplification circuit during an offset compensation stage, wherein the first inverting amplifier and the second inverting amplifier are cross-coupled during the offset compensation stage.

An input-referred offset voltage compensation method, applicable to an amplifier circuit, the method comprising:

• connecting, through a control circuit coupled to the amplifier circuit, a first node of the amplifier circuit with a second node of the amplifier circuit to cause voltages on the first node and the second node to converge;
• separating, through the control circuit, the first node from the second node;
• determining a time of compensation;
• powering on the amplifier circuit for the time of compensation to generate a first signal and a second signal, wherein the first signal is generated at the first node, and the second signal is generated at the second node;
• and
• routing, through the control circuit, the first signal to the second node, and the second signal to the first node to compensate an input-referred offset voltage of the amplifier circuit.

A method to operate a sense amplifier circuit, wherein the sense amplifier circuit is connected to a first bitline through a first bitline switch circuit, and connected to a second bitline through a second bitline switch circuit, and the sense amplifier circuit is configured to amplify a voltage signal applied between the first bitline and the second bitline, the method comprising:

• while the sense amplifier circuit amplifying the voltage signal, disconnecting, by operating the first bitline switch circuit and the second bitline switch circuit, the sense amplifier circuit from the first bitline and the second bitline;
• keeping the sense amplifier circuit disconnected from the first bitline and the second bitline for a predetermined period of time;
• and
• reconnecting, by operating the first bitline switch circuit and the second bitline switch circuit, the sense amplifier circuit with the first bitline and the second bitline.