Method for electrically examining electronic components of an integrated circuit
AssigneeForschungszentrum Juelich GmbH
InventorsBert Voigtlaender, Vasily Cheperanov
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AssigneeForschungszentrum Juelich GmbH
InventorsBert Voigtlaender, Vasily Cheperanov
Estimating the term…
The invention relates to a method for electrically examining electronic components of an integrated circuit. According to the invention, a method for electrically examining electronic components of an integrated circuit (1) is provided, comprising a target region (3) to be examined in which electronic components having contact points (5) are located, and a remaining region, referred to as non-target region (2), in which an examination is carried out using a combined SEM/AFM nanoprobe. In a first step, the non-target region (2) is at least partially imaged with the scanning electron microscope part of the SEM/AFM nanoprobe, and in a subsequent step the target region (3) is at least partially imaged with the atomic force microscope part of the SEM/AFM nanoprobe.
Method for electrically examining electronic components of an integrated circuit (1), comprising a target region (3) which is to be examined and in which electronic components with contact points (5) are located, and a remaining region referred to as non-target region (2),
Dependencies are inferred from the claim text.