Image sensor

An image sensor comprising:

• a pixel array in which a plurality of pixels are arranged;
• and
• processing circuitry,
• wherein each of the plurality of pixels includes,
• a photodiode;
• a floating diffusion node configured to integrate photocharge generated by the photodiode;
• a reset transistor configured to reset the floating diffusion node;
• a first source follower configured to amplify and output a voltage of the floating diffusion node to a first node;
• a first pre-charge select transistor configured to transmit the amplified voltage to an output node;
• a first capacitor;
• a second capacitor;
• a first sampling transistor, one terminal of which is connected to the first capacitor, and another terminal of which is connected to the output node, the first sampling transistor being configured to transmit the amplified voltage to the first capacitor;
• and
• a second sampling transistor, one terminal of which is connected to the second capacitor, and another terminal of which is connected to the output node, the second sampling transistor being configured to transmit the amplified voltage to the second capacitor,
• wherein the processing circuitry is configured to turn on the first sampling transistor and the second sampling transistor, such that the first and second sampling transistors operate during a first period and charge stored in the first capacitor and the second capacitor is output as a pixel signal.

An image sensor comprising:

• a pixel array in which a plurality of pixels are arranged;
• and
• a row driver circuit configured to control the pixel array,
• wherein each of the plurality of pixels comprises:
• a photodiode;
• a floating diffusion node configured to integrate photocharge generated by the photodiode;
• a first sampling transistor configured to sample charge at the floating diffusion node, in response to the floating diffusion node being reset;
• a first capacitor connected to the first sampling transistor and configured to store photocharge sampled by the first sampling transistor;
• a second sampling transistor configured to sample an integrated charge of the floating diffusion node, in response to the floating diffusion node integrating the photocharge generated by the photodiode;
• and
• a second capacitor connected to the second sampling transistor and configured to store photocharge sampled by the second sampling transistor, wherein the row driver circuit is configured to,
• during a first period, turn on and control the first sampling transistor to output charge stored in the first capacitor as a first pixel signal,
• during a second period, turn on and control the second sampling transistor to output charge stored in the second capacitor as a second pixel signal, and
• during a third period, turn on and control the first sampling transistor and the second sampling transistor to output charge stored in the first capacitor and the second capacitor as the second pixel signal.