Techniques for detecting changes to circuit delays in telecommunications networks

One or more non-transitory computer-readable media including instructions that, when executed by one or more processors, cause the one or more processors to assess delays associated with a circuit by performing the steps of:

• determining a measured trip time between a first device and a second device, wherein the first device and the second device are connected via the circuit;
• performing one or more digital signal processing operations that reduce a first variance associated with the measured trip time to generate a first predicted trip time;
• and
• determining at least one characteristic of a delay associated with the circuit based on the first predicted trip time.

A system comprising:

• one or more memories storing instructions;
• and
• one or more processors that are coupled to the one or more memories and,
• when executing the instructions, are configured to perform the steps of:
• determining a measured trip time between a first device within a network and a second device within the network,
• performing one or more digital signal processing operations based on the measured trip time to generate a predicted trip time that is associated with a variance attributable to the first device, and
• determining at least one of a delay associated with the circuit, a change in the delay associated with the circuit, or a length of the circuit based on the predicted trip time.