Translation device, test system including the same, and memory system including the translation device
AssigneeSamsung Electronics Co., Ltd.
InventorsHyungmin JIN, Younghoon SON, Hyunyoon CHO, Youngdon CHOI, Junghwan CHOI
Life of this patent
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Abstract
A translation device, a test system, and a memory system are provided. The translation device includes plural first input/output (I/O) circuits that respectively transmit and receive first signals through plural pins based on a pulse amplitude modulation (PAM)-M mode, a second I/O circuit that transmits and receives a second signal through one or more pins based on a PAM-N mode, and a translation circuit that translates the first signals into the second signal and translates the second signal into the first signals. M and N are different integers of 2 or more.
Claims21
A translation device comprising:
- a plurality of first input/output (I/O) circuits configured to respectively transmit and receive first signals through a plurality of pins based on a pulse amplitude modulation (PAM)-M mode;
- at least one second I/O circuit configured to transmit and receive a second signal through at least one pin based on a PAM-N mode;
- and
- a translation circuit configured to translate the first signals into the second signal and to translate the second signal into the first signals, wherein
- M and N are different integers of 2 or more.
A translation device comprising:
- a first input/output (I/O) circuit configured to transmit and receive a first signal based on a pulse amplitude modulation (PAM)-M mode;
- a second I/O circuit configured to transmit and receive a second signal based on a PAM-N mode;
- a translation circuit configured to translate the first signal into the second signal and to translate the second signal into the first signal;
- a first termination circuit disposed between a first I/O pin and the first I/O circuit and configured to provide a first termination resistance;
- and
- a second termination circuit disposed between a second I/O pin and the second I/O circuit and configured to provide a second termination resistance,
- wherein M and N are different integers of 2 or more.
21-27. (canceled)
Dependencies are inferred from the claim text.