Noise reducing receiver
AssigneeRambus Inc.
InventorsMasum HOSSAIN, Carl W. WERNER
Life of this patent
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Abstract
Disclosed is receiver for a noise limited system. A front-end circuit amplifies and band-limits an incoming signal. The amplification increases the signal swing but introduces both thermal and flicker noise. A low-pass band limitation reduces the thermal noise component present at frequencies above what is necessary for correctly receiving the transmitted symbols. This band limited signal is provided to the integrator circuit. The output of the integrator is equalized to reduce the effects of inter-symbol interference and then sampled. The samples are used to apply low frequency equalization (i.e., in response to long and/or unbalanced strings of symbols) to mitigate the effects of DC wander caused by mismatches between the number of symbols of each kind being received.
Claims21
(canceled)
An integrated circuit, comprising:
- front-end circuitry to receive a signal during a current symbol time and to provide a bandwidth limited signal based on the signal;
- summer circuitry to receive the bandwidth limited signal and to, based on a previous symbol sampler decision indicator, produce an equalized integrator input signal corresponding to the current symbol time;
- first integrator circuitry to receive the equalized integrator input signal and provide an integrator output signal;
- and
- a first sampler to produce a current symbol sampler decision indicator based on the integrator output signal corresponding to the current symbol time.
An integrated circuit, comprising:
- correction circuitry to reduce an error component in a bandwidth limited signal corresponding to a current symbol time based on a first plurality of consecutive symbol sampler decisions;
- filter circuitry to provide the bandwidth limited signal based on an input signal;
- equalization circuitry to receive the bandwidth limited signal and to, based on a previous symbol sampler decision indicator, produce an equalized integrator input signal corresponding to the current symbol time;
- integrator circuitry to receive the equalized integrator input signal and provide an integrator output signal;
- and
- a first sampler to produce a current symbol sampler decision indicator based on the integrator output signal corresponding to the current symbol time, the current symbol sampler decision indicator to be included in a second plurality of consecutive symbol sampler decisions to reduce an error component in the bandwidth limited signal corresponding to at least one subsequent symbol time.
An integrated circuit, comprising:
- summer circuitry to receive a bandwidth limited signal during a current symbol time and to, based on a previous symbol sampler decision indicator, produce an equalized integrator input signal;
- first integrator circuitry to receive the equalized integrator input signal and provide an integrator output signal;
- and
- a first sampler to produce a current symbol sampler decision indicator based on the integrator output signal corresponding to the current symbol time.
Dependencies are inferred from the claim text.