US 2022/0190270 A1 · SOLID-STATE RELAY AND SEMICONDUCTOR DEVICE

Abstract

A solid-state relay having favorable electrical characteristics is provided. The solid-state relay includes a first circuit and a second circuit. The first circuit includes a first light-emitting element. The second circuit includes a first light-receiving element, a memory, and a first switch. The memory includes a second switch. The second switch includes a second semiconductor layer. The first switch and the first light-emitting element are formed using a first semiconductor layer. The first semiconductor layer and the second semiconductor layer contain gallium, and the second semiconductor layer further contains oxygen. On or off of the first light-emitting element is controlled by a first signal supplied to the first circuit. First data, which is generated when the first light-receiving element converts light emitted by the first light-emitting element into voltage, is supplied to the memory. Conduction or non-conduction of the first switch is controlled by the first data stored in the memory.

Claims14

Dependent claims

(canceled)

A solid-state relay comprising a first circuit and a second circuit,

wherein the first circuit comprises a first light-emitting element and a second light-emitting element,
wherein the second circuit comprises a first light-receiving element, a second light-receiving element, a memory, and a first switch,
wherein the first switch, the first light-emitting element, and the second light-emitting element comprise a first semiconductor layer,
wherein the first semiconductor layer comprises gallium,
wherein on or off of the first light-emitting element is controlled by a first signal supplied to the first circuit,
wherein on or off of the second light-emitting element is controlled by a second signal supplied to the first circuit,
wherein light emitted by the first light-emitting element by the first signal is supplied to the first light-receiving element,
wherein the first light-receiving element generates first data by converting the light into voltage,
wherein the first data is stored in the memory,
wherein the first switch is controlled so as to be brought into conduction by the first data stored in the memory,
wherein light emitted by the second light-emitting element by the second signal is supplied to the second light-receiving element,
wherein the second light-receiving element generates second data by converting the light into voltage,
wherein the first data stored in the memory is initialized by the second data, and
wherein the first switch is controlled so as to be brought into non-conduction when the first data stored in the memory is initialized.

11 more elements

A solid-state relay comprising a first circuit and a second circuit,

wherein the first circuit comprises a first light-emitting element, a second light-emitting element, a first terminal, a second terminal, and a third terminal,
wherein the second circuit comprises a first transistor, a second transistor, a third transistor, a first light-receiving element, a second light-receiving element, a capacitor, a fourth terminal, and a fifth terminal,
wherein the first terminal is electrically connected to one electrode of the first light-emitting element,
wherein the third terminal is electrically connected to one electrode of the second light-emitting element,
wherein the second terminal is electrically connected to the other electrode of the first light-emitting element and the other electrode of the second light-emitting element,
wherein a gate of the first transistor is electrically connected to one of a source and a drain of the second transistor, one of a source and a drain of the third transistor, and one electrode of the capacitor,
wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the second transistor and one electrode of the first light-receiving element,
wherein a gate of the third transistor is electrically connected to one electrode of the second light-receiving element,
wherein the fourth terminal is electrically connected to one of a source and a drain of the first transistor,
wherein the fifth terminal is electrically connected to the other of the source and the drain of the first transistor, the other of the source and the drain of the third transistor, the other electrode of the capacitor, the other electrode of the first light-receiving element, and the other electrode of the second light-receiving element,
wherein light emitted by the first light-emitting element is supplied to the first light-receiving element,
wherein light emitted by the second light-emitting element is supplied to the second light-receiving element, and
wherein a wiring electrically connecting the gate of the first transistor, the one of the source and the drain of the second transistor, and the one of the source and the drain of the third transistor is positioned to block light so that the light emitted by the first light-emitting element does not enter the second light-receiving element and is positioned to block light so that the light emitted by the second light-emitting element does not enter the first light-receiving element.

10 more elements

Dependencies are inferred from the claim text.

Facts

Application

17/600,906Filed 7 Apr 2020

Priority

JP 2019-07904418 Apr 2019

Published

16 Jun 2022

Term ends

Not estimatedThe source records don’t support an estimate.

Classification15 codes

H10F 55/255
Wherein the radiation-sensitive devices and the electric light source are all semiconductor devices: formed in, or on, a common substrate
H03K 17/78
Characterised by the components used: using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled
H03K 17/785
Using opto-electronic devices, i.e. light-emitting and photoelectric devices electrically- or optically-coupled: controlling field-effect…
H10D 30/60
Field-effect transistors [FET]: insulated-gate field-effect transistors [IGFET]

Solid-state relay and semiconductor device

Life of this patent

Solid-state relay and semiconductor device

Life of this patent

Abstract

Claims14