Method of fabricating three-dimensional semiconductor memory device

A method of fabricating a three-dimensional semiconductor memory device, the method comprising:

• providing a substrate that includes a key region and a cell region;
• forming a cell stack layer on the substrate, the cell stack layer covering the key region and the cell region, the cell stack layer including a variable resistance layer and a switching layer that are vertically stacked on the substrate;
• forming a plurality of key mask patterns and a plurality of cell mask patterns on the substrate, the plurality of key mask patterns being spaced apart from each other in a first direction on the cell stack layer on the key region, and the plurality of cell mask patterns being spaced apart from each other in the first direction on the cell stack layer on the cell region;
• and
• simultaneously forming a plurality of key patterns on the key region and a plurality of memory cells on the cell region by etching the cell stack layer using the plurality of key mask patterns and the plurality of cell mask patterns as an etching mask, wherein
• each of the plurality of memory cells includes a variable resistance pattern and a switching pattern that are formed by etching the variable resistance layer and the switching layer, and
• each of the plurality of key patterns includes a dummy variable resistance pattern and a dummy switching pattern that are formed by etching the variable resistance layer and the switching layer.