LDMOS Architecture and Method for Forming

A semiconductor device, comprising:

• a semiconductor wafer having an active layer of a first conductivity type, the active layer comprising a deep well of a second conductivity type, a shallow well of the second conductivity type, a source region of the first conductivity type, a first channel region of the second conductivity type, a second channel region of the second conductivity type, a first drift region of the first conductivity type, a second drift region of the first conductivity type, a first drain region of the first conductivity type, a second drain region of the first conductivity type, and a source connection region of the second conductivity type;
• first gate polysilicon formed above the active layer and having a first polysilicon gate spacer laterally disposed next to the first gate polysilicon;
• second gate polysilicon formed above the active layer and having a second polysilicon gate spacer laterally disposed next to the second gate polysilicon, the source connection region being laterally disposed between the first polysilicon gate spacer and the second polysilicon gate spacer;
• a first gate shield formed above the first gate polysilicon;
• a second gate shield formed above the second gate polysilicon;
• a dielectric region formed over the active layer;
• and
• a metal source contact extending vertically from a top surface of the dielectric region to the source connection region, the metal source contact being laterally disposed between the first polysilicon gate spacer and the second polysilicon gate spacer.