Spacer structure for semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Han Wang, Ding-Kang Shih, Chun-Hsiung Lin, Teng-Chun Tsai, Zhi-Chang Lin, Akira Mineji, Yao-Sheng Huang
Life of this patent
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Abstract
The present disclosure describes an inner spacer structure for a semiconductor device and a method for forming the same. The method for forming the inner spacer structure in the semiconductor device can include forming a vertical structure over a substrate, forming a gate structure over a portion of the vertical structure, exposing sidewalls of the portion of the vertical structure, forming multiple spacers over the sidewalls of the portion of the vertical structure, and forming a void in each of the multiple spacers.
Claims20
A semiconductor structure, comprising:
- a substrate;
- a vertical structure over the substrate, wherein the vertical structure comprises:
- a first portion having one or more channel layers separated from each other;
- and
- a second portion having a source/drain region in contact with the one or more channel layers;
- a gate structure between each of the one or more channel layers;
- and
- a plurality of inner spacers disposed between the gate structure and the source/drain region, wherein each of the plurality of inner spacer comprises a void.
A semiconductor device, comprising:
- a substrate;
- a vertical structure formed on the substrate;
- a stack of channel regions in the vertical structure, wherein the vertical structure comprises source/drain regions electrically coupled to the stack of channel regions;
- a gate structure surrounding each of the channel regions in the stack of channel regions;
- and
- inner spacers on opposite sidewalls of each gate structure, each inner spacer comprising a void.
A transistor, comprising:
- a substrate;
- a stack of nanostructures formed on the substrate, the nanostructures comprising channel regions alternating with gate structures;
- source/drain regions formed on the substrate, the source/drain regions coupled to the channel regions;
- and
- spacers formed adjacent to the gate structures, the spacers comprising insulators and encapsulating void structures.
Dependencies are inferred from the claim text.