Vfet contact formation
AssigneeInternational Business Machines Corporation
InventorsHeng Wu, Ruilong Xie, Tian Shen, Kai Zhao
Life of this patent
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Abstract
An embodiment of the invention may include a Vertical Field Effect Transistor (VFET) structure, and method of making that structure, having a first VFET and a second VFET. The first VFET may include a single liner between a first source/drain epi and a contact. The second VFET may include two liners between a second source/drain epi and a contact. This may enable proper contact liner matching for differing VFET devices.
Claims25
A semiconductor device comprising:
- a first Vertical Field Effect Transistor (VFET), wherein the first VFET has a first source/drain epi, and wherein a single liner is between the first source/drain epi and a first contact;
- and
- a second VFET, wherein the second VFET has a second source/drain epi, and wherein two liners are between the second source/drain epi and a second contact.
A semiconductor device comprising:
- a first Vertical Field Effect Transistor (VFET), wherein the first VFET has a first source/drain epi, and wherein at least one liner is between the first source/drain epi and a first contact;
- and
- a second VFET, wherein the second VFET has a second source/drain epi, and at least two liners are between the second source/drain epi and a second contact, and wherein the number of liners above the second VFET is greater than the number of liners above the first VFET.
A method of forming a semiconductor device comprising:
- forming a first Vertical Field Effect Transistor (VFET) having a first source/drain epi, and a second VFET having a second source/drain epi;
- performing a first ion implantation on the second source/drain epi forming an implanted source/drain epi;
- performing a selective deposition of a first liner metal on the implanted source/drain epi;
- performing as second implantation, wherein the second ion implantation is a blanket ion implantation, and wherein the first liner metal blocks implantation into the second source/drain epi.
A method of forming a semiconductor device comprising:
- forming a first Vertical Field Effect Transistor (VFET) having a first source/drain epi, and a second VFET having a second source/drain epi;
- forming a cap above first source/drain epi;
- performing a first ion implantation on the second source/drain epi forming an implanted source/drain epi, wherein the first ion implantation is a blanket ion implantation, and wherein the cap blocks implantation into the first source/drain epi;
- performing a selective deposition of a first liner metal on the implanted source/drain epi;
- and
- performing as second implantation, wherein the second ion implantation is a blanket ion implantation, and wherein the first liner metal blocks implantation into the second source/drain epi.
Dependencies are inferred from the claim text.