Semiconductor device
AssigneeFuji Electric Co., Ltd.
InventorMasaharu YAMAJI
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes: a well region of a second conductivity-type deposited on a surface layer of a semiconductor layer of a first conductivity-type; a breakdown voltage region of the second conductivity-type arranged to surround the well region and having a lower impurity concentration than the well region; a base region of the first conductivity-type arranged to surround the breakdown voltage region; a carrier supply region of the second conductivity-type arranged on a surface layer of the base region and serving as a level shifter; and a carrier reception region of the level shifter, wherein the carrier reception region is formed of a first universal contact region including a region of the first conductivity-type and a region of the second conductivity-type arranged in contact with each other.
Claims19
A semiconductor device including a high-potential-side circuit region, a high-voltage junction termination structure arranged along a circumference of the high-potential-side circuit region, and a low-potential-side circuit region arranged at a circumference of the high-potential-side circuit region via the high-voltage junction termination structure that are integrated in a single semiconductor chip, the semiconductor device comprising:
- a semiconductor layer of a first conductivity-type;
- a well region of a second conductivity-type located in the high-potential-side circuit region and deposited on a surface layer of the semiconductor layer;
- a breakdown voltage region of the second conductivity-type arranged in contact with the well region to surround the well region and having a lower impurity concentration than the well region;
- a base region of the first conductivity-type arranged in contact with the breakdown voltage region to surround the breakdown voltage region;
- a carrier supply region of the second conductivity-type arranged on a surface layer of the base region and serving as a level shifter included in a level-shift circuit that transfers signals between the low-potential-side circuit region and the high-potential-side circuit region;
- and
- a carrier reception region of the level shifter arranged on a surface layer of the well region or the breakdown voltage region,
- wherein the carrier reception region is formed of a first universal contact region including a region of the first conductivity-type and a region of the second conductivity-type arranged in contact with each other.
A semiconductor device including a high-potential-side circuit region, a high-voltage junction termination structure arranged along a circumference of the high-potential-side circuit region, and a low-potential-side circuit region arranged at a circumference of the high-potential-side circuit region via the high-voltage junction termination structure that are integrated in a single semiconductor chip, the semiconductor device comprising:
- a semiconductor layer of a first conductivity-type;
- a well region of a second conductivity-type located in the high-potential-side circuit region and deposited on a surface layer of the semiconductor layer;
- a breakdown voltage region of the second conductivity-type arranged in contact with the well region to surround the well region and having a lower impurity concentration than the well region;
- a base region of the first conductivity-type arranged in contact with the breakdown voltage region to surround the breakdown voltage region;
- a carrier supply region of the second conductivity-type arranged on a surface layer of the base region and serving as a level shifter included in a level-shift circuit that transfers signals between the low-potential-side circuit region and the high-potential-side circuit region;
- a carrier reception region of the level shifter arranged on a surface layer of the well region or the breakdown voltage region;
- and
- a plurality of pickup regions arranged on the surface layer of the well region,
- wherein one of the pickup regions is formed of a universal contact region including a region of the first conductivity-type and a region of the second conductivity-type arranged in contact with each other.
A semiconductor device including a high-potential-side circuit region, a high-voltage junction termination structure arranged along a circumference of the high-potential-side circuit region, and a low-potential-side circuit region arranged at a circumference of the high-potential-side circuit region via the high-voltage junction termination structure that are integrated in a single semiconductor chip, the semiconductor device comprising:
- a semiconductor layer of a first conductivity-type;
- a well region of a second conductivity-type located in the high-potential-side circuit region and deposited on a surface layer of the semiconductor layer;
- a breakdown voltage region of the second conductivity-type arranged in contact with the well region to surround the well region and having a lower impurity concentration than the well region;
- a base region of the first conductivity-type arranged in contact with the breakdown voltage region to surround the breakdown voltage region;
- a carrier supply region of the second conductivity-type arranged on a surface layer of the base region and serving as a level shifter included in a level-shift circuit that transfers signals between the low-potential-side circuit region and the high-potential-side circuit region;
- and
- a carrier reception region of the level shifter arranged on a surface layer of the well region or the breakdown voltage region,
- wherein the carrier supply region and the carrier reception region are arranged parallel to each other in a planar pattern,
- the carrier supply region has a wider width than the carrier reception region, and
- a density of the carrier supply region is lower at a position opposed to the carrier reception region than at a position not opposed to the carrier reception region.
Dependencies are inferred from the claim text.