US 2022/0190031 A1 · CAPACITIVE PILLAR ARCHITECTURE FOR A MEMORY ARRAY

Abstract

Methods, systems, and devices for a capacitive pillar architecture for a memory array are described. An access line within a memory array may be, include, or be coupled with a pillar. The pillar may include an exterior electrode, such as a hollow exterior electrode, surrounding an inner dielectric material that may further surround an interior, core electrode. The interior electrode may be maintained at a voltage level during at least a portion of an access operation for a memory cell coupled with the pillar. Such a pillar structure may increase a capacitance of the pillar, for example, based on a capacitive coupling between the interior and exterior electrodes. The increased capacitance may provide benefits associated with operating the memory array, such as increased memory cell programming speed, programming reliability, and read disturb immunity.

Claims25

Dependent claims

An apparatus, comprising:

a stack comprising a plurality of first layers, each first layer comprising a respective memory material element of a plurality of memory material elements coupled with a respective first electrode of a plurality of first electrodes;
and
a pillar extending through the plurality of first layers and coupled with the plurality of memory material elements, wherein a memory material element of the plurality of memory material elements is operable to be accessed based at least in part on a voltage difference between the pillar and the respective first electrode, and wherein the pillar comprises:
a second electrode;
a third electrode at least partially surrounding the second electrode and coupled with the plurality of memory material elements;
and
a dielectric material interposed between the second electrode and the third electrode, the dielectric material electrically isolating the second electrode from the third electrode.

4 more elements

An apparatus, comprising:

a stack comprising a plurality of first layers, each first layer comprising a respective first electrode of a plurality of first electrodes coupled with a corresponding plurality of memory material elements;
a pillar extending through the plurality of first layers and coupled with a respective first memory material element at each first layer, the pillar comprising:
an interior electrode;
and
an exterior electrode at least partially surrounding the interior electrode and coupled with the respective first memory material elements;
and
a controller operable to;
apply a first voltage to an electrode of the plurality of first electrodes;
access a memory material element of the respective first memory material elements based at least in part on applying a second voltage to the exterior electrode;
and
maintain the interior electrode at a third voltage at least partially concurrently with applying the second voltage.

8 more elements

Dependencies are inferred from the claim text.

Capacitive pillar architecture for a memory array

Life of this patent

Capacitive pillar architecture for a memory array

Life of this patent

Abstract

Claims25