Wiring Layer And Manufacturing Method Therefor
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsYutaka Okazaki, Tomoaki MORIWAKA, Shinya SASAGAWA, Takashi OHTSUKI
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AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsYutaka Okazaki, Tomoaki MORIWAKA, Shinya SASAGAWA, Takashi OHTSUKI
Estimating the term…
To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. An end of the first conductor is at a level lower than or equal to the top level of the opening. The top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.
A method for manufacturing a wiring layer, comprising:
Dependencies are inferred from the claim text.