US 2022/0189991 A1 · THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE

Abstract

A semiconductor device is provided. The semiconductor device includes a stack structure that includes a plurality of dielectric layers spaced apart from each other on a substrate, a plurality of electrodes interposed between the plurality of dielectric layers, and a plurality of stopper layers interposed between the plurality of dielectric layers; and a vertical channel structure that penetrates the stack structure. Each of the plurality of electrodes and the plurality of stopper layers is disposed in a corresponding empty space interposed between the plurality of dielectric layers, the plurality of stopper layers includes a first stopper layer and a second stopper layer that is interposed between the first stopper layer and the substrate, and at least one of the plurality of electrodes is interposed between the first stopper layer and the second stopper layer.

Claims20

Dependent claims

A semiconductor memory device, comprising:

a substrate;
a stack structure on the substrate, the stack structure including a plurality of electrodes that are stacked on the substrate and spaced apart from each other;
a vertical channel structure that penetrates the stack structure;
and
a polysilicon layer between the substrate and a lowermost electrode of the plurality of electrodes,
wherein a lower portion of the vertical channel structure penetrates the polysilicon layer,
wherein a first sidewall of the lower portion of the vertical channel structure contacts the polysilicon layer, and
wherein a bottom surface of the vertical channel structure is lower than a bottom surface of the polysilicon layer.

5 more elements

Dependencies are inferred from the claim text.

Three-dimensional semiconductor memory device

Life of this patent

Three-dimensional semiconductor memory device

Life of this patent

Abstract

Claims20