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US 2022/0189986 A1Published application
Three-dimensional memory device with plural channels per memory opening and methods of making the same
AssigneeSanDisk Technologies LLC
InventorTakeki NINOMIYA
Life of this patent
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Abstract
A three-dimensional memory device includes an alternating stacks of insulating layers and electrically conductive layers. Memory opening fill structures located in memory openings include a memory film and plural vertical semiconductor channels.
Claims20
A three-dimensional memory device comprising a memory die that includes:
- an alternating stack of insulating layers and electrically conductive layers;
- elongated trenches that vertically extend through the alternating stack, laterally bounded by sidewalls of the alternating stack, laterally extending along a first horizontal direction, and laterally spaced apart from each other along a second horizontal direction;
- and
- trench fill structures located in the elongated trenches, wherein each of the trench fill structures comprises two rows of memory stack structures that are arranged along the first horizontal direction and laterally spaced apart from each other along the second horizontal direction, and each of the memory stack structures comprises a vertical semiconductor channel and a memory film,
- wherein the electrically conductive layers comprise word-line-level electrically conductive layers, and each of the word-line-level electrically conductive layers laterally encloses a plurality of trench fill structures as a respective continuous structure.
2 more elements
A method of forming a three-dimensional memory device including a memory die, the method comprising:
- forming an alternating stack of insulating layers and sacrificial material layers over a substrate;
- forming elongated trenches through the alternating stack, wherein each of the elongated trenches laterally extend along a first horizontal direction;
- forming a memory film and a semiconductor channel layer in the elongated trenches;
- forming two rows of memory stack structures within each of the elongated trenches by patterning the semiconductor channel layer and the memory film, wherein the two rows of memory stack structures are arranged along the first horizontal direction and are laterally spaced apart from each other along the second horizontal direction, and each of the memory stack structures comprises a vertical semiconductor channel that is a patterned portion of the semiconductor channel layer and a patterned portion of the memory film;
- replacing the sacrificial material layers with electrically conductive layers;
- removing the substrate after formation of the electrically conductive layers;
- exposing source side surfaces of the vertical semiconductor channels after removing the substrate;
- and
- forming a source layer on physically exposed surfaces of the vertical semiconductor channels.
6 more elements
Dependencies are inferred from the claim text.