Memory device

A memory device, comprising:

• a first memory bank, comprising:
• a plurality of first edge cells arranged in at least one first edge column of a plurality of memory columns;
• a plurality of first memory cells arranged in a first set of the plurality of memory columns, wherein an edge column in the first set of the plurality of memory columns is right adjacent to the at least one first edge column of the plurality of memory columns;
• a plurality of second edge cells arranged in a second set of the plurality of memory columns and a plurality of second memory cells arranged in a third set of the plurality of memory columns, wherein the plurality of second edge cells are sandwiched between the plurality of first memory cells and the plurality of second memory cells;
• a plurality of third edge cells arranged in at least one second edge column of the plurality of memory columns, wherein an edge column in the third set of the plurality of memory columns is right adjacent to the at least one second edge column of the plurality of memory columns;
• and
• a plurality of first word lines coupled to the plurality of first memory cells and a plurality of second word lines coupled to the plurality of second memory cells, wherein the plurality of first word lines and the plurality of second word lines are terminated at the second set of the plurality of memory columns.

A memory device, comprising:

• a plurality of memory segments arranged adjacent to a word line decoder, wherein one of the plurality of memory segments is configured to be activated in response to a word line signal transmitted from the word line decoder;
• and
• an isolation cell arranged sandwiched between two adjacent segments of the plurality of memory segments,
• wherein each one segment of the two adjacent segments includes a first decoder and a memory array coupled thereto through a plurality of word lines,
• wherein the first decoders of the two adjacent segments are arranged on opposite sides of the isolation cell, and the plurality of word lines are arranged between the first decoders of the two adjacent segments.