Semiconductor memory device and method for fabricating the same

A semiconductor memory device comprising:

• a substrate including a cell region and a peri region around the cell region, the cell region including an active region defined by an element separation film;
• a cell separation film defining the cell region in the substrate;
• a storage pad connected to the active region of the cell region;
• a peri gate structure on the substrate of the peri region;
• a peri contact plug on both sides of the peri gate structure and connected to the substrate, an upper surface of the peri contact plugs on a same plane as an upper surface of the storage pad;
• a first interlayer insulating film on the storage pad and on the peri contact plug and including a nitride-based insulating material;
• and
• a capacitor including a lower electrode connected to the storage pad, a capacitor dielectric film on the lower electrode, and a plate upper electrode on the capacitor dielectric film,
• wherein an upper surface of the first interlayer insulating film includes a step structure on the cell separation film.

A semiconductor memory device comprising:

• a substrate including a cell region, and a peri region around the cell region, the cell region including an active region defined by an element separation film;
• a cell separation film defining the cell region of the substrate;
• a bit line structure including a cell conductive line and a cell line capping film on the cell conductive line, the bit line structure on the substrate of the cell region;
• a cell gate electrode placed inside the substrate of the cell region and intersecting the cell conductive line;
• a storage pad on a side surface of the bit line structure and connected to the active region of the cell region;
• a peri gate structure on the substrate of the peri region;
• a peri contact plug on both sides of the peri gate structure and connected to the substrate;
• a capacitor including a lower electrode connected to the storage pad, a capacitor dielectric film on the lower electrode, and a plate upper electrode on the capacitor dielectric film;
• a lower interlayer insulating film which on the peri contact plug and including a nitride-based insulating material, a termination of the lower interlayer insulating film covered by the plate upper electrode;
• and
• an upper interlayer insulating film on the lower interlayer insulating film and covering side walls of the plate upper electrode,
• wherein the lower interlayer insulating film is not on the upper surface of the storage pad.