Semiconductor Device Packages, Packaging Methods, and Packaged Semiconductor Devices

A method of manufacturing a semiconductor device, the method comprising:

• encapsulating a first semiconductor device with an encapsulant;
• forming a conductive redistribution layer extending over both a first semiconductor device and an encapsulant adjacent to the first semiconductor device;
• forming a protection pattern located over the encapsulant, the protection pattern comprising a second conductive material that is electrically isolated from all elements below a surface of the encapsulant, the surface of the encapsulant facing the protection pattern, the protection pattern comprising a first conductive feature and a second conductive feature, the second conductive feature being separated from the first conductive feature by a dielectric material in a direction extending away from the encapsulant, wherein the dielectric material electrically isolates the protection pattern;
• electrically connecting a device to the first semiconductor device through a first external connection and the conductive redistribution layer;
• and
• electrically connecting a printed circuit board to the first semiconductor device through a second external connection, the second external connection being on an opposite side of the first semiconductor device than the first external connection.

A method of manufacturing a semiconductor device, the method comprising:

• encapsulating a semiconductor die within an encapsulant;
• depositing a plurality of first conductive layers over both the semiconductor die and the encapsulant;
• depositing a plurality of second conductive layers overlying the encapsulant, wherein individual ones of the plurality of second conductive layers are aligned with respective ones of the plurality of first conductive layers, wherein at least one of the plurality of second conductive layers is located in a different metallization layer from a second one of the plurality of second conductive layers, wherein a dielectric material completely electrically isolates the plurality of second conductive layers from the plurality of first conductive layers and from the encapsulant;
• placing external connectors in electrical connection with the plurality of first conductive layers, wherein the dielectric material completely electrically isolates the plurality of second conductive layers from each one of the external connectors that are located on an opposite side of the dielectric material from the semiconductor die;
• bonding a substrate to the external connectors, wherein each pad located on a side of the substrate facing the semiconductor die is connected to a respective one of the external connectors, wherein after the bonding a first memory chip is connected to the external connectors through the substrate and a second memory chip is connected to the external connectors through the substrate;
• and
• connecting a printed circuit board to the semiconductor die, the printed circuit board being located on an opposite side of the semiconductor die from the substrate.