Memory card
AssigneeSamsung Electronics Co., Ltd.
InventorYoungwoo PARK
Life of this patent
Estimating the term…
Abstract
A memory card includes an upper case, a lower case, and an integrated circuit package between the upper case and the lower case. The integrated circuit package includes a memory stacked chip on a panel substrate, and the memory stacked chip includes a base memory stacked chip and an additional memory stacked chip stacked on the base memory stacked chip. The integrated circuit package includes a frequency boosting interface chip on the panel substrate and electrically connected to the memory stacked chip, and a controller chip on the panel substrate and electrically connected to the memory stacked chip and the frequency boosting interface chip.
Claims20
A memory card comprising:
- an upper case;
- a lower case;
- and
- an integrated circuit package between the upper case and the lower case,
- wherein the integrated circuit package comprises:
- a memory stacked chip on a panel substrate, wherein the memory stacked chip comprises a base memory stacked chip and an additional memory stacked chip stacked on the base memory stacked chip;
- a frequency boosting interface chip on the panel substrate and electrically connected to the memory stacked chip;
- and
- a controller chip on the panel substrate and electrically connected to the memory stacked chip and the frequency boosting interface chip.
A memory card comprising:
- a memory stacked chip on a panel substrate, wherein the memory stacked chip comprises a base memory stacked chip and an additional memory stacked chip stacked on the base memory stacked chip;
- a frequency boosting interface chip on the panel substrate and electrically connected to the memory stacked chip;
- and
- a controller chip on the panel substrate and electrically connected to the memory stacked chip and the frequency boosting interface chip.
A memory card comprising:
- a memory stacked chip comprising a plurality of memory chips stacked on a panel substrate in a staircase shape and adhered to each other by an adhesive layer, wherein the memory stacked chip comprises a base memory stacked chip and an additional memory stacked chip on the base memory stacked chip;
- a first connection member that electrically connects the memory stacked chip to the panel substrate and electrically connects the plurality of memory chips to each other;
- a frequency boosting interface chip on the panel substrate and is spaced apart from the memory stacked chip;
- a second connection member that electrically connects the frequency boosting interface chip to the memory stacked chip;
- a third connection member that electrically connects the frequency boosting interface chip to the panel substrate;
- a controller chip on the panel substrate and is spaced apart from the frequency boosting interface chip;
- and
- a fourth connection member that electrically connects the controller chip to the panel substrate.
Dependencies are inferred from the claim text.