Semiconductor package including plurality of semiconductor chips and method for manufacturing the same

A method for manufacturing a semiconductor package, comprising:

• providing a wafer comprising a front surface comprising a circuit layer and a back surface opposite the front surface;
• forming a protective film on the front surface of the wafer;
• providing a multilayer adhesive film comprising a die attach film;
• forming a plurality of elongated openings extending through the multilayer adhesive film;
• removing the protective film to expose the front surface of the wafer;
• attaching the die attach film to the back surface of the wafer to form a stack;
• separating the stack into a plurality of individual stacks;
• separating each of the plurality of individual stacks into an upper stack and a lower stack, the upper stack comprising a first semiconductor chip and a die attach pattern covering a portion of a back surface of the first semiconductor chip;
• providing a substrate on which a second semiconductor chip is mounted;
• and
• stacking the upper stack on the second semiconductor chip,
• wherein a first side surface of the die attach pattern is vertically misaligned from a first side surface of the first semiconductor chip while being vertically misaligned from a first side surface of the second semiconductor chip, and the first side surfaces of the first semiconductor chip and the second semiconductor chip are disposed adjacent the first side surface of the die attach pattern.

A method for manufacturing a semiconductor package, comprising:

• providing a wafer comprising a front surface comprising a scribe lane and a back surface opposite the front surface;
• forming a protective film on the front surface of the wafer;
• providing a multilayer adhesive film comprising a die attach film, a cover layer covering a lower surface of the die attach film, a photosensitive adhesive (PSA) layer covering an upper surface of the die attach film, and a base layer covering an upper surface of the PSA layer;
• forming a notch and a plurality of bar-shaped openings extending through the multilayer adhesive film;
• removing the protective film to expose the front surface of the wafer;
• removing the cover layer from the multilayer adhesive film, and attaching the die attach film to the back surface of the wafer to form a stack;
• separating the stack into a plurality of individual stacks;
• separating each of the plurality of individual stacks into an upper stack and a lower stack, the upper stack comprising a semiconductor chip and a die attach pattern covering a portion of a back surface of the semiconductor chip;
• and
• stacking the upper stack on a substrate,
• wherein, in the stack, the openings are vertically aligned with portions of the scribe lane, and
• wherein a width of each of the openings is 1 to 10% of a width of the semiconductor chip.