Formation method of chip package
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsPo-Yao CHUANG, Po-Hao TSAI, Shin-Puu JENG, Shuo-Mao CHEN, Ming-Chih YEW
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Abstract
A method for forming a chip package is provided. The method includes forming a plurality of conductive structures over a carrier substrate. The method also includes disposing a semiconductor die over the carrier substrate such that the conductive ti structures surround the semiconductor die. The method further includes disposing a shielding element over the semiconductor die and the conductive structures. The shielding element is electrically connected to the conductive structures.
Claims20
A method for forming a chip package, comprising:
- forming a plurality of conductive structures over a carrier substrate;
- disposing a semiconductor die over the carrier substrate such that the conductive structures surround the semiconductor die;
- and
- disposing a shielding element over the semiconductor die and the conductive structures, wherein the shielding element is electrically connected to the conductive structures.
A method for forming a chip package, comprising:
- forming a plurality of conductive structures over a redistribution structure;
- and
- disposing a semiconductor die over the redistribution structure such that the conductive structures surround the semiconductor die;
- wherein two of the conductive structures are separated from each other by a distance, and the distance is smaller than half a wavelength of an electromagnetic wave generated by the semiconductor die.
A method for forming a chip package, comprising:
- disposing a first semiconductor die and a second semiconductor die over the a redistribution structure;
- and
- disposing a plurality of conductive structures over the redistribution structure;
- wherein the conductive structures surround an area where the first semiconductor die is positioned, and the second semiconductor die is positioned outside of the area.
Dependencies are inferred from the claim text.