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US 2022/0189574 A1Published application
Memory device protection using interleaved multibit symbols
AssigneeMicron Technology, Inc.
InventorsPaolo Amato, Marco Sforzin, Stephen S. Pawlowski
Life of this patent
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Abstract
Symbols interleaved among a set of codewords can provide an error correction/detection capability to a dual in-line memory module (DIMM) with memory chips having a comparatively larger bus width. Data corresponding to a set of multibit symbols and received from one or more memory devices can be interleaved/distributed with other bits of at least one codeword.
Claims23
An apparatus, comprising:
- one or more memory devices;
- and
- a controller coupled to the one or more memory devices, the controller configured to:
- read data corresponding to a set of multibit symbols from one of the one or more memory devices;
- wherein the data comprises multibit symbols of the set interleaved with other bits of at least one codeword;
- and
- wherein the controller is configured to detect one or more erroneous multibit symbols corresponding to data received from more than a single memory device of the one or more memory devices during a same data burst.
4 more elements
(canceled)
A method, comprising:
- receiving data corresponding to a first set of multibit symbols from a first memory device of one or more memory devices and a second set of multibit symbols from a second memory device of the one or more memory devices;
- and
- interleaving the data corresponding to the first set of multibit symbols and the second set of multibit symbols among a first codeword and a second codeword, wherein in response to the data corresponding to the first set and the second set of multibit symbols being interleaved:
- a first codeword comprises a first symbol of the first set and a first symbol of the second set of multibit symbols;
- and
- a second codeword comprises a second symbol of the first set and a second symbol of the second set of multibit symbols.
3 more elements
A system, comprising:
- one or more N-bit memory devices, each one of the one or more N-bit memory devices configured to provide data corresponding to one or more multibit symbols totaling N bits per data burst;
- and
- a controller coupled to the one or more N-bit memory devices, the controller configured to:
- receive, at least in part from the one or more N-bit memory devices, subsets of data corresponding to a set of multibit symbols including a first multibit symbol and a second multibit symbol;
- and
- interleave the subsets corresponding to the set of multibit symbols among a set of codewords to perform, with an error correction capability of correcting a single erroneous multibit symbol or detecting two erroneous multibit symbols within a respective one of the set of codewords, an error correction code (ECC) operation on:
- the first multibit symbol of the set of multibit symbols of a first codeword of the set of codewords;
- and
- the second multibit symbol of the set of multibit symbols of a second codeword of the set of codewords.
6 more elements
An apparatus, comprising:
- one or more memory devices;
- and
- a controller coupled to the one or more memory devices, the controller configured to:
- read data corresponding to a set of multibit symbols from one of the one or more memory devices;
- wherein the data comprises multibit symbols of the set interleaved with other bits of at least one codeword;
- and
- wherein at least one of the one or more memory devices is a 16-bit memory device configured to provide 16-bit data at a time to the controller.
4 more elements
An apparatus, comprising:
- one or more memory devices;
- and
- a controller coupled to the one or more memory devices, the controller configured to:
- read data corresponding to a set of multibit symbols from one of the one or more memory devices;
- wherein the data comprises multibit symbols of the set interleaved with other bits of at least one codeword;
- and
- wherein the controller is configured to correct one or more erroneous multibit symbols of the set received during a particular data burst when the one or more erroneous multibit symbols corresponds to data received from a single memory device of the one or more memory devices.
4 more elements
An apparatus, comprising:
- one or more memory devices;
- and
- a controller coupled to the one or more memory devices, the controller configured to:
- read data corresponding to a set of multibit symbols from one of the one or more memory devices;
- wherein the data comprises multibit symbols of the set interleaved with other bits of at least one codeword;
- and
- wherein the controller is configured to include the set of multibit symbols within a single codeword, and wherein:
- each symbol within the single codeword corresponds to 8-bit data received over four data bursts;
- and
- the controller is configured to perform an ECC operation on the single codeword to provide an error correction/detection capability of correcting three erroneous symbols within the codeword or detecting four erroneous symbols within the codeword, or both.
7 more elements
Dependencies are inferred from the claim text.