Sensing Techniques for Resistive Memory
AssigneeArm Limited
InventorsCyrille Nicolas Dray, El Mehdi Boujamaa
Life of this patent
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Abstract
Various implementations described herein are related to a device having a sense amplifier that provides output data based on sensing a difference between input signals. The device may have a tracking circuit that tracks a resistive state of a bitcell and provides an input signal to the sense amplifier based on the tracked resistive state of the bitcell. The device may have a bitcell circuit that senses a data value associated with the resistive state of the bitcell and provides another input signal to the sense amplifier based on the sensed data value of the bitcell.
Claims20
A device comprising:
- a sense amplifier that provides output data based on sensing a difference between input signals;
- a tracking circuit that tracks a resistive state of a bitcell and provides an input signal to the sense amplifier based on the tracked resistive state of the bitcell, the tracking circuit having a first resistive bitcell coupled in series with a first resistor to an inverting input of the sense amplifier;
- and
- a bitcell circuit that senses a data value associated with the resistive state of the bitcell and provides another input signal to the sense amplifier based on the sensed data value of the bitcell, the bitcell circuit having the bitcell as a second resistive bitcell coupled in series with a second resistor to a non-inverting input of the sense amplifier.
(canceled)
A device comprising:
- sense amplifier circuitry having an array of sense amplifiers that provides multi-bit output data based on sensing a difference between multiple input signals,
- wherein each sense amplifier in the array of sense amplifiers includes:
- tracking circuitry that tracks a resistive state of a memory cell and provides a first input signal of the multiple input signals to each sense amplifier based on the tracked resistive state of the memory cell, the tracking circuitry for each sense amplifier having a first resistive bitcell coupled in series with a first resistor to an inverting input of each sense amplifier;
- and
- memory circuitry that senses a data value associated with the resistive state of the memory cell and provides a second input signal of the multiple input signals to each sense amplifier based on the sensed data value of the memory cell, the memory circuitry for each sense amplifier having the memory cell as a second resistive bitcell coupled in series with a second resistor to a non-inverting input of each sense amplifier.
(canceled)
A method comprising:
- fabricating an array of sense amplifiers that provides multi-bit output data signals based on sensing a difference between multiple input signals;
- fabricating tracking circuitry for the sense amplifiers that tracks resistive states of bitcells and provides first input signals to the sense amplifiers based on the tracked resistive states of the bitcells, the tracking circuitry for each sense amplifier having a first resistive bitcell coupled in series with a first resistor to an inverting input of each sense amplifier;
- and
- fabricating memory circuitry for the sense amplifiers that senses stored data values associated with the resistive states of the bitcells and provides second input signals to the sense amplifiers based on the sensed data values of the bitcells, the memory circuitry for each sense amplifier having the memory cell as a second resistive bitcell coupled in series with a second resistor to a non-inverting input of each sense amplifier.
Dependencies are inferred from the claim text.