Managing read level voltage offsets for low threshold voltage offset bin placements
AssigneeMicron Technology, Inc.
InventorsKishore Kumar Muchherla, Mustafa N. Kaynak, Michael Sheperek, Shane Nowell
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Abstract
A block family associated with a memory device is created. The block family is associated with a threshold voltage offset bin. A set of read level voltage offsets is determined such that, applying the set of read level voltage offsets to a base read level threshold voltage associated with the block family, result in a suboptimal error rate not exceeding a maximum allowable error rate. The determined set of read level offsets is associated with the threshold voltage offset bin by updating a block family metadata.
Claims20
A method comprising:
- creating a block family associated with a memory device;
- associating the block family with a threshold voltage offset bin;
- determining a set of read level voltage offsets such that, when applied to a base read level threshold voltage associated with the block family, result in a suboptimal error rate not exceeding a maximum allowable error rate;
- and
- associating the set of read level voltage offsets with the threshold voltage offset bin.
A system comprising:
- a memory device;
- and
- a processing device, operatively coupled with the memory device, to perform operations comprising:
- identifying a block associated with the memory device;
- performing a series of read operations for the block using a plurality of sets of read level voltage offsets;
- and
- identifying a set of read level voltage offsets of the plurality of sets of read level voltage offsets, wherein the set of read level voltage offsets, when applied to a base read level voltage associated with the block, result in a suboptimal error rate not exceeding a maximum allowable error rate.
A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
- creating a block family associated with a memory device;
- associating the block family with a threshold voltage offset bin;
- determining a set of read level voltage offsets such that, when applied to a base read level threshold voltage associated with the block family, result in a suboptimal error rate not exceeding a maximum allowable error rate;
- and
- associating the set of read level voltage offsets with the threshold voltage offset bin.
Dependencies are inferred from the claim text.