Array substrate, and display panel and display device thereof

An array substrate, comprising:

• a substrate;
• a pixel array disposed on the substrate, comprising a plurality of sub-pixels arranged in a plurality of rows and a plurality of columns, wherein each of the sub-pixels has a pixel circuit, and a data signal input terminal, a scan signal input terminal, and a driving reset control signal input terminal coupled to the pixel circuit, the pixel circuit comprises a data writing circuit, a driving circuit and a driving reset circuit, the driving circuit comprises a control terminal, a first terminal, and a second terminal, the data writing circuit is coupled to the data signal input terminal, the scan signal input terminal and the first terminal of the driving circuit, and is configured to provide a data signal to the first terminal of the driving circuit under a control of a scan signal, the driving circuit is configured to provide a driving current to a light-emitting device, and the driving reset circuit is coupled to the driving reset control signal input terminal, the control terminal of the driving circuit, and a reset voltage terminal, and is configured to reset the control terminal of the driving circuit under a control of the driving reset control signal;
• a plurality of pairs of scan signal lines, extending in a row direction and being spaced apart from each other in a column direction, wherein each of the plurality of pairs of scan signal lines comprises a first scan signal line and a second scan signal line, and a m-th pair of scan signal lines corresponds to the sub-pixels in a m-th row, where m is an integer greater than or equal to 1, and wherein the first scan signal line of the m-th pair of scan signal lines is configured to provide a first scan signal to the scan signal input terminal of the sub-pixel in a (2n−1)-th column from the sub-pixels in the m-th row, where n is an integer greater than or equal to 1, and the second scan signal line of the m-th pair of scan signal lines is configured to provide a second scan signal to sub-pixel in a 2n-th column from the sub-pixels in the m-th row;
• and
• a plurality of pairs of driving reset control signal lines, extending in the row direction and being spaced apart from each other in the column direction, wherein each of the plurality of pairs of driving reset control signal lines comprises a first driving reset control signal line and a second driving reset control signal line, and a m-th pair of driving reset control signal lines corresponds to the sub-pixels in the m-th row,
• wherein the first driving reset control signal line of the m-th pair of driving reset control signal lines is configured to provide a first driving reset control signal to the driving reset control signal input terminal of the sub-pixel in the (2n−1)-th column from the sub-pixels in the m-th row, and the second driving reset control signal line of the m-th pair of driving reset control signal lines is configured to provide a second driving reset control signal to the driving reset control signal input terminal of the sub-pixel in a 2n-th column from the sub-pixels in the m-th row of sub-pixels, and
• the first scan signal line of the m-th pair of scan signal lines and the second driving reset control signal line of the m-th pair of driving reset control signal lines are the same signal line.