Event-driven spiking convolutional neural network

A memory mapper (130) equipment for an event-driven spiking convolutional neural network configured to determine kernel addresses and neuron addresses (142n) to be updated in an event-driven fashion, when a spike event (140) is received by the memory mapper (130), wherein the spike event (140) comprising or consisting of an information about a coordinate (x,y) and a channel identifier (c) of the spike event (140), the coordinate comprising an x-identifier and y-identifier, wherein when a spike event (140) is received by the memory mapper (130), the memory mapper (130) executes the following sequence of operations:

• zero padding (300) (x+px, y+py) the coordinate (x,y) of the spike event (140) with a predefined offset (px, py) provided by and stored in a register (300r),
• from the coordinate (x,y), computing (301) a neuron anchor coordinate (x0, y0) to which the spike event projects-fe, and a corresponding kernel anchor coordinate (x0k, y0k) of the at least one kernel (410, f), wherein the kernel anchor coordinate (x0k, y0k) is indicative of a kernel coordinate (f-x0k, y0k) for each of the at least one kernel (410, f), wherein the neuron anchor coordinate is associated to an output feature map (430),
• starting (302) from the neuron anchor coordinate and the kernel anchor coordinate, determining all neuron coordinates (f, x, y) that are to be updated and all kernel coordinates (c,f,xk,yk) of the applicable kernel values by processing information on an output feature map size, a stride size and/or a kernel size that are provided by a register,
• determining (303) from the determined all neuron coordinates (f,x,y) and the all kernel coordinates (c,f,xk,yk) of the applicable kernel values compressed neuron addresses and compressed kernel addresses,
• providing the determined compressed neuron addresses and compressed kernel addresses to a kernel module (110) and/or a neuron module (120) for processing the compressed neuron addresses and compressed kernel addresses.