Operating method of transaction accelerator, operating method of computing device including transaction accelerator, and computing device including transaction accelerator
AssigneeSamsung Electronics Co., Ltd.
InventorSangwoo KIM
Life of this patent
Estimating the term…
Abstract
A transaction accelerator may be connected between at least one host device and a bus, and a method of operating the transaction accelerator may include receiving a first transaction request from the at least one host device, transmitting the first transaction request to the bus, and transmitting a first transaction response corresponding to the first transaction request to the at least one host device, in response to the transmitting the first transaction request to the bus.
Claims20
An operation method of a transaction accelerator connected between at least one host device and a bus, the method comprising:
- receiving a first transaction request from the at least one host device;
- transmitting the first transaction request to the bus;
- and
- transmitting a first transaction response corresponding to the first transaction request to the at least one host device in response to the transmitting the first transaction request to the bus.
An operating method of a computing device which includes at least one processor, a transaction accelerator, and a plurality of peripheral devices, the method comprising:
- transmitting, by the at least one processor, a first read transaction request to the transaction accelerator;
- transmitting, by the transaction accelerator, a first read transaction response to the at least one processor, the first read transaction response corresponding to the first read transaction request;
- transmitting, by the at least one processor, a second read transaction request to the transaction accelerator in response to the first read transaction response;
- transmitting, by the transaction accelerator, a second read transaction response corresponding to the second read transaction request to the at least one processor;
- and
- transmitting, by the transaction accelerator, the first read transaction request and the second read transaction request to at least one peripheral device of the plurality of peripheral devices.
A computing device comprising:
- a bus;
- a plurality of peripheral devices connected to the bus;
- and
- a central processing unit (CPU) connected to the bus, the CPU configured to control the plurality of peripheral devices through the bus,
- the CPU including,
- at least one processor core, and
- a transaction accelerator including two or more transaction slots, the transaction accelerator is configured to,
- receive a first transaction request from the at least one processor core,
- transmit a first transaction response to the at least one processor core in response to the received first transaction request,
- transfer the first transaction request to the bus, and
- store information related to the first transaction request in one of the two or more transaction slots until the first transaction request is completed.
Dependencies are inferred from the claim text.