Status check using chip enable pin

An apparatus, comprising:

• a first memory device comprising a first driver;
• a second memory device comprising a second driver;
• a pin coupled with the first driver and the second driver, and configured to receive a chip enable signal for the first memory device;
• and
• a controller coupled with the first memory device, the second memory device, and the pin, wherein the controller is operable to cause the apparatus to:
• determine a status of the first memory device based at least in part on receiving the chip enable signal;
• and
• bias the pin to a first voltage indicating that the first memory device is able to be accessed or a second voltage indicating that the first memory device is unable to be accessed based at least in part on determining the status of the first memory device.

A method performed by a first memory device, comprising:

• receiving a chip enable signal over a pin configured to receive the chip enable signal, wherein the first memory device comprises a first driver and a second memory device comprises a second driver, and wherein the pin is coupled to the first driver and the second driver;
• determining a status of the first memory device based at least in part on receiving the chip enable signal;
• and
• biasing the pin to a first voltage indicating that the first memory device is able to be accessed or a second voltage indicating that the first memory device is unable to be accessed based at least in part on determining the status of the first memory device.

An apparatus, comprising:

• a first memory device comprising a first driver;
• a second memory device comprising a second driver;
• and
• a pin coupled with the first driver and the second driver,
• wherein the first driver is configured to bias the pin to a first voltage indicating that the first memory device is able to be accessed or a second voltage indicating that the first memory device is unable to be accessed.