Exclusion regions for host-side memory address translation

A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of an electronic device coupled with a memory system, cause the electronic device to:

• identify one or more regions of logical addresses of the memory system associated with exclusion from operating according to logical to physical addresses mapping by the electronic device for access commands by the electronic device;
• and
• signal, to the memory system, an indication to inhibit communication of tables for logical to physical addresses mapping by the electronic device for the one or more regions.

A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of an electronic device coupled with a host system, cause the electronic device to:

• receive an indication from the host system of one or more regions of logical addresses of the electronic device for which to inhibit communication, to the host system, of mappings between logical addresses and physical addresses for the one or more regions;
• and
• inhibit the communication of the mappings between logical addresses and physical addresses of the electronic device associated with the one or more regions of logical addresses based at least in part on receiving the indication.