Efficient Redundancy Management in Key-Value NAND Flash Storage
AssigneePliops Ltd.
InventorMoshe Twitto
Life of this patent
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Abstract
A method for error correction of logical pages of an erase block of a solid state drive (SSD) memory, the method may include determining an erase block score of the erase block, wherein the calculating is based on a program erase (PE) cycle of the erase block and one or more erase block error correction parameter; determining, based on (a) the erase block score, and (b) a mapping between the erase block score and one or more page error correction parameters for each page type out of multiple pages types, the one or more page error correction parameter for each page type; and allocating, within each page of the erase block, an overprovisioning space and an error correction space, based on at least one page error correction parameter related to a page type of the page.
Claims3
A method for error correction of logical pages of an erase block of a solid state drive (SSD) memory, the method comprises:
- determining an erase block score of the erase block, wherein the calculating is based on a program erase (PE) cycle of the erase block and one or more erase block error correction parameter;
- determining, based on (a) the erase block score, and (b) a mapping between the erase block score and one or more page error correction parameters for each page type out of multiple pages types, the one or more page error correction parameter for each page type;
- and
- allocating, within each page of the erase block, an overprovisioning space and an error correction space, based on at least one page error correction parameter related to a page type of the page.
A non-transitory computer readable medium that stores instructions for:
- determining an erase block score of an erase block, wherein the calculating is based on a program erase (PE) cycle of the erase block and one or more erase block error correction parameter;
- wherein the erase block is a part of a solid state drive (SSD) memory;
- determining, based on (a) the erase block score, and (b) a mapping between the erase block score and one or more page error correction parameters for each page type out of multiple pages types, the one or more page error correction parameter for each page type;
- and
- allocating, within each page of the erase block, an overprovisioning space and an error correction space, based on at least one page error correction parameter related to a page type of the page.
A solid state drive (SSD) memory controller that comprises at least one circuit that is configured to determine an erase block score of an erase block, wherein the calculating is based on a program erase (PE) cycle of the erase block and one or more erase block error correction parameter;
- wherein the erase block is a part of a solid state drive (SSD) memory;
- determine, based on (a) the erase block score, and (b) a mapping between the erase block score and one or more page error correction parameters for each page type out of multiple pages types, the one or more page error correction parameter for each page type;
- and allocate, within each page of the erase block, an overprovisioning space and an error correction space, based on at least one page error correction parameter related to a page type of the page.
Dependencies are inferred from the claim text.