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US 2022/0188183 A1Published application
Memory system, operation method of the same, and memory controller
AssigneeSK hynix Inc.
InventorsTae-Pyeong KIM, Jae-Woo KIM, Hyun-Jin NOH, Pyo-Young HAN
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Abstract
A method for operating a memory system includes: performing a first training operation for alignment between a clock and a data strobe signal; performing a second training operation for alignment between the data strobe signal and the data; detecting an error of the second training operation; and adjusting a delay value of the data strobe signal in response to the detection of the error.
Claims5
A memory system, comprising:
- a memory controller;
- and
- a memory,
- wherein the memory controller comprises:
- a clock transfer circuit suitable for transferring a clock;
- a data strobe signal transfer circuit suitable for transferring a data strobe signal;
- a data strobe signal delay circuit suitable for delaying a preliminary data strobe signal by a first delay value to generate the data strobe signal;
- a first data receiving circuit;
- a first data transfer circuit suitable for transferring data;
- a data delay circuit suitable for delaying a preliminary data by a second delay value to generate the data;
- a first training control circuit suitable for adjusting the first delay value in response to a signal received by the first data receiving circuit during a first training operation for alignment between the clock and the data strobe signal;
- and
- a second training control circuit for adjusting the second delay value in response to a signal received by the first data receiving circuit during a second training operation for alignment between the data strobe signal and the data, and the memory comprises:
- a clock receiving circuit suitable for receiving the clock;
- a data strobe signal receiving circuit suitable for receiving the data strobe signal;
- a clock sampling circuit suitable for sampling the clock in synchronization with the data strobe signal during the first training operation to produce a sampling result;
- a second data receiving circuit suitable for receiving the data based on the data strobe signal that is received by the data strobe signal receiving circuit;
- a second data transfer circuit suitable for transferring the sampling result during the first training operation, and feeding back the data received by the second data receiving circuit during the second training operation,
- wherein, when the second training control circuit detects an error of the second training operation, the second training control circuit adjusts the first delay value.
16 more elements
Dependencies are inferred from the claim text.