System and method for handling floating point hardware exception

A computer-implemented method comprising:

• receiving a first input data and a second input data at a floating point arithmetic operating unit, wherein the first input data and the second input data are associated with operands of a floating point arithmetic operation respectively, wherein the floating point operating unit is configured to perform a floating point arithmetic operation on the first input data and the second input data;
• determining whether the first input data is a quiet not-a-number (qnan) or whether the first input data is a signaling not-a-number (snan) prior to performing the floating point arithmetic operation;
• and
• setting the first input data to zero if the first input data is the qnan or the snan, wherein the setting occurs prior to performing the floating point arithmetic operation.

A system comprising:

• a logic engine configured to
• receive a first input data and a second input data at a floating point arithmetic operating unit, wherein the first input data and the second input data are associated with operands of a floating point arithmetic operation respectively, wherein the floating point operating unit is configured to perform a floating point arithmetic operation on the first input data and the second input data,
• determine whether the first input data is a quiet not-a-number (qnan) or whether the first input data is a signaling not-a-number (snan) prior to performing the floating point arithmetic operation;
• and
• a convertor engine configured to convert a value of the first input data to a modified value prior to performing the floating point arithmetic operation if the first input data is either the qnan or the snan, wherein the converting eliminates special handling by the floating point arithmetic operating unit on the first input data being either the qnan or the snan.

A system comprising:

• a means for receiving a first input data and a second input data at a floating point arithmetic operating unit, wherein the first input data and the second input data are associated with operands of a floating point arithmetic operation respectively, wherein the floating point operating unit is configured to perform a floating point arithmetic operation on the first input data and the second input data;
• a means for determining whether the first input data is a quiet not-a-number (qnan) or whether the first input data is a signaling not-a-number (snan) prior to performing the floating point arithmetic operation;
• and
• a means for setting the first input data to zero if the first input data is the qnan or the snan, wherein the setting occurs prior to performing the floating point arithmetic operation.