Memory system, memory controller, and operation method of memory system
AssigneeSK hynix Inc.
InventorsSeung Gu Ji, Hyung Min Lee
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Abstract
Memory systems, memory controllers, and operation methods of the memory systems are disclosed. In one example aspect, the memory system may suspend a target operation, such as a program operation or an erase operation, based on whether or not to execute a first operation of resetting a reference read bias when a failure occurs in a read operation executed after the target operation is suspended, and a number of times the target operation is suspended. In this way, the memory system may reduce a delay associated with the suspension of program operations and erasure operations.
Claims19
A memory system comprising:
- a memory device including memory cells to store data and operable to perform an operation on one or more memory cells;
- and
- a memory controller in communication with the memory device and configured to control the memory device to perform an operation,
- wherein the memory controller is configured to:
- suspend a target operation that is being executed by the memory device based on i) whether or not to execute a first operation of resetting a reference read bias when a failure occurs in a read operation executed after the target operation is suspended, and ii) a number of times the target operation is suspended, upon receiving a request for suspending the target operation or a read request from a host
The memory system of claim 3, wherein the value of the first reference number of suspensions when the target operation is an erase operation is greater than the value of the first reference number of suspensions when the target operation is a program operation
The memory system of claim 3, wherein the memory controller is configured to, when suspending the target operation after the target operation is resumed from a previous suspension, suspend the target operation only after a predetermined minimum delay time has passed since the resumption of the target operation.
A memory controller comprising:
- a memory interface configured to communicate with a memory device;
- and
- a processor configured to communicate with the memory device through the memory interface to suspend the target operation based on whether a first operation configured to reset a reference read bias is performed upon occurrence of a failure in a read operation executed after the target operation is suspended, and based on a suspension count of the target operation, upon receiving a request for suspending the target operation or a read request from a host
An operation method of a memory system, the method comprising:
- determining, while a target operation is in progress, whether a first operation configured to reset a reference read bias is performed upon occurrence of a failure in a read operation executed after the target operation is suspended, and based on a suspension count of the target operation;
- and
- suspending the target operation based on whether the first operation is performed and the suspension count of the target operation, upon receiving a request for suspending the target operation or a read request from a host.
Dependencies are inferred from the claim text.