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US 2022/0187988 A1Published application
Apparatuses and methods for configurable memory array bank architectures
AssigneeMicron Technology, Inc.
InventorsDean D. Gans, Shunichi Saito
Life of this patent
Estimating the term…
Abstract
Apparatuses and methods for configurable memory array bank architectures are described. An example apparatus includes a mode register configured to store information related to bank architecture and a memory array including a plurality of memory banks. The plurality of memory banks are configured to be arranged in a bank architecture based at least in part on the information related to bank architecture stored in the mode register.
Claims20
A method comprising:
- programming a value in a mode register of a memory to select a bank architecture from a plurality of bank architectures, wherein each bank architecture of the plurality of bank architectures comprises a plurality of memory banks of the memory arranged according to the bank architecture selected by the value programmed in the mode register;
- and
- mapping addresses to a memory array comprising the plurality of memory banks based, at least in part, on the bank architecture selected.
An apparatus comprising:
- a mode register configured to store a value to select a bank architecture from a plurality of bank architectures;
- a memory array;
- and
- address decoding logic configured to map addresses to the memory array based, at least in part, on the bank architecture selected.
1 more element
A method comprising:
- programming a value in a mode register of a memory to select a bank architecture from a plurality of bank architectures, wherein each bank architecture of the plurality of bank architectures comprises a plurality of memory banks of the memory arranged according to the bank architecture selected by the value programmed in the mode register;
- and
- providing an access command and an address to the memory to access the plurality of memory banks according to the bank architecture selected by the value, wherein the plurality of memory banks are accessed at a location corresponding to the address according to the selected bank architecture.
Dependencies are inferred from the claim text.