Accurate timestamp or derived counter value generation on a complex cpu

One or more hardware-based non-transitory computer-readable memory devices storing computer-executable instructions which, upon execution by at least one processor in a computing device, cause the computing device to:

• instantiate a timekeeping module on the computing device;
• instantiate an operating system on the computing device, the operating system including a time function;
• operate the timekeeping module to make back-to-back calls to the time function including an initial call that is followed by a subsequent call;
• load time function instructions into a pipeline of the processor in response to the initial call;
• store data associated with the time function in a memory that is accessible by the processor in response to the initial call;
• in response to the initial call, predict how the time function instructions will execute on the processor and execute the instructions using the stored data according to the prediction;
• retain a history of the execution according to the prediction;
• and
• in response to the subsequent call, re-execute the time function instructions using the stored data according to the retained history.

A computing device configured with a high-resolution timer, comprising:

• at least one processor having a continuously running counter, an instruction cache, and a branch predictor, the processor having a working state and one or more sleep states;
• and
• at least one non-transitory computer-readable storage media having computer-executable instructions stored thereon which, when executed by the least one processor, cause the computing device to
• perform successive calls to a time function that is instantiated on the computing device including an initial call followed by a subsequent call, the time function interfacing with the counter to retrieve current values of the counter;
• in response to the initial call to the time function, cache instructions associated with the time function in the instruction cache;
• attempt to optimize execution of the time function instructions by predicting an execution path of the time function instructions using the branch predictor;
• in response to the prediction, execute instructions for the time function to initially return the current value of the counter to the time function;
• and
• in response to the subsequent call to the time function, re-execute the time function instructions according to results of the prediction to subsequently return the current value of the counter to the time function,
• wherein the processor remains in the working state while re-executing the time function instructions.