Semiconductor Integrated Circuit Device and Inspection Method for Semiconductor Integrated Circuit Device
AssigneeHitachi Astemo, Ltd.
InventorsAkeo SATOH, Kazunori NEMOTO, Akira KOTABE
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit device and an inspection method for a semiconductor integrated circuit device capable of improving burn-in screening quality by improvement in an activation rate of a DSP without operating a diagnostic circuit at the time of wafer level burn-in in a semiconductor integrated circuit device incorporating an analog circuit and the diagnostic circuit for the analog circuit are provided.
Claims13
A semiconductor integrated circuit device comprising:
- an analog circuit;
- a diagnostic circuit that detects an abnormality on an input side of the analog circuit;
- a digital signal processing unit connected to an analog circuit output side;
- a voltage generation circuit that is connected to the input side of the analog circuit and generates a plurality of voltages;
- and
- a switch circuit that is provided between the analog circuit and the voltage generation circuit and is switched on when a burn-in switching signal is input, wherein
- the voltage generation circuit outputs a plurality of voltages that do not cause the diagnostic circuit to function.
A semiconductor integrated circuit device comprising:
- an analog circuit;
- a diagnostic circuit that detects an abnormality on an input side of the analog circuit;
- a digital signal processing unit connected to an analog circuit output side;
- a voltage generation circuit that is connected to the input side of the analog circuit and generates a plurality of voltages;
- and
- a switch circuit that is provided between the analog circuit and the voltage generation circuit and is switched on when a burn-in switching signal is input, wherein
- the diagnostic circuit stops a function thereof when a burn-in switching signal is input.
An inspection method for a semiconductor integrated circuit device incorporating an analog circuit and a diagnostic circuit for the analog circuit, the inspection being burn-in screening by wafer level burn-in, the inspection method comprising
- inputting a voltage that does not cause the diagnostic circuit to function to the analog circuit and the diagnostic circuit at the time of the wafer level burn-in.
Dependencies are inferred from the claim text.