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US 2022/0166434 A1Published application
Data-driven phase detector element for phase locked loops
AssigneeKandou Labs, S.A.
InventorArmin Tajalli
Life of this patent
Estimating the term…
Abstract
Generating a composite interpolated phase-error signal for clock phase adjustment of a local oscillator by forming a summation of weighted phase-error signals generated using a matrix of partial phase comparators, each of which compare a phase of the local oscillator with a corresponding phase of a reference clock.
Claims20
An apparatus comprising:
- a plurality of multi-input comparators (MICs) configured to generate a set of MIC outputs by forming respective orthogonal linear combinations of a set of wire signals received in parallel over a plurality of wires of a multi-wire bus, at least one MIC output having been pre-coded with a transition density code and at least one MIC connected to at least three wires;
- a data-driven phase comparator circuit configured to receive the plurality of MIC outputs in parallel from the plurality of MICs and one or more phases of a local oscillator signal, the data-driven phase comparator circuit comprising a plurality of partial phase comparators, each partial phase comparator configured to:
- receive (i) a corresponding phase of the local oscillator signal and (ii) a corresponding MIC output of the plurality of MIC outputs;
- responsive to a determination that a transition occurred in the corresponding MIC output, generate a partial phase-error signal based on a comparison of the corresponding phase of the local oscillator signal and the corresponding MIC output;
- apply a respective weighting factor to the partial phase-error signal, wherein at least two partial phase comparators of the plurality of partial phase comparators have different weighting factors;
- and
- a summation circuit configured to receive each partial phase-error signal and to generate a composite phase-error signal to set a local oscillator generating the one or more phases of the local oscillator signal in a lock condition.
4 more elements
A method comprising:
- generating a set of MIC outputs using a plurality of multi-input comparators (MICs), each MIC output generated by forming a respective orthogonal linear combination of a set of wire signals received in parallel over a plurality of wires of a multi-wire bus, at least one MIC output having been pre-coded with a transition density code and at least one MIC connected to at least three wires;
- generating a plurality of partial phase-error signals using a plurality of partial phase comparators, wherein generating each partial phase-error signal comprises:
- receiving (i) a corresponding phase of the local oscillator signal and (ii) a corresponding MIC output of the plurality of MIC outputs;
- responsive to a determination that a transition occurred in the corresponding MIC output, generating a comparison of the corresponding phase of the local oscillator signal and the corresponding MIC output;
- generating the partial phase-error signal by applying a respective weighting factor to the comparison of the corresponding phase of the local oscillator signal and the corresponding MIC output, wherein at least two partial phase-error signals have different weighting factors;
- and
- generating a composite phase-error signal using a summation circuit by adding the plurality of partial phase-error signals, the composite phase-error signal setting a local oscillator generating the one or more phases of the local oscillator signal in a lock condition.
4 more elements
Dependencies are inferred from the claim text.