Spur reduction for analog-to-digital converters
AssigneePrecision Receivers Incorporated
InventorsPaul K.W. JACKSON, William O'REILLY
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Abstract
Methods, systems, computer-readable media, and apparatuses for spurious information reduction in a data signal are presented. One example of such an apparatus includes a data converter including a plurality of analog-to-digital converters (ADCs) and configured to produce a plurality of sampled signals, a normalizer configured to obtain a plurality of common-bandwidth signals from at least the plurality of sampled signals, and a common-mode filter configured to produce a digital output signal based on the plurality of common-bandwidth signals.
Claims38
An apparatus for spurious information reduction in a data signal, the apparatus comprising:
- a data converter including a plurality of analog-to-digital converters (ADCs), each of the plurality of ADCs being arranged to receive a corresponding one of a plurality of instances of an analog input signal,
- wherein each of the plurality of ADCs is configured to generate a corresponding one of a plurality of sampled signals, and
- wherein a first of the plurality of ADCs is configured to generate a first of the plurality of sampled signals by sampling a first of the plurality of instances of the analog input signal at a first sampling rate according to a first clock frequency, and
- wherein a second of the plurality of ADCs is configured to generate a second of the plurality of sampled signals by sampling a second of the plurality of instances of the analog input signal at a second sampling rate that is different than the first sampling rate according to a second clock frequency that is different than the first clock frequency;
- a normalizer configured to normalize at least one signal that is based on at least one of the plurality of sampled signals to obtain, from at least the plurality of sampled signals, a plurality of common-bandwidth signals, wherein each of the plurality of common-bandwidth signals is based on at least a corresponding one of the plurality of sampled signals, and
- a common-mode filter configured to perform a common-mode filtering operation, based on information from the plurality of common-bandwidth signals, to produce a digital output signal.
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A method for spurious information reduction in a data signal, the method comprising:
- receiving, by each of a plurality of analog-to-digital converters (ADCs), a corresponding one of a plurality of instances of an analog input signal;
- generating, by each of the plurality of ADCs and responsive to the receiving, a corresponding one of a plurality of sampled signals, wherein the generating comprises:
- sampling a first of the plurality of instances of the analog input signal by a first of the plurality of ADCs at a first sampling rate according to a first clock frequency to generate a first of the plurality of sampled signals, and
- sampling a second of the plurality of instances of the analog input signal by a second of the plurality of ADCs at a second sampling rate that is different than the first sampling rate according to a second clock frequency that is different than the first clock frequency to generate a second of the plurality of sampled signals;
- normalizing at least one signal that is based on at least one of the plurality of sampled signals to obtain, from at least the plurality of sampled signals, a plurality of common-bandwidth signals, wherein each of the plurality of common-bandwidth signals is based on at least a corresponding one of the plurality of sampled signals, and
- performing a common-mode filtering operation, based on information from the plurality of common-bandwidth signals, to produce a digital output signal.
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A system for spurious information reduction in a data signal, the system comprising:
- a data converter including a plurality of analog-to-digital converters (ADCs), each of the plurality of ADCs being arranged to receive a corresponding one of a plurality of instances of an analog input signal,
- wherein each of the plurality of ADCs is configured to generate a corresponding one of a plurality of sampled signals, and
- wherein a first of the plurality of ADCs is configured to generate a first of the plurality of sampled signals by sampling a first of the plurality of instances of the analog input signal at a first sampling rate according to a first clock frequency, and
- wherein a second of the plurality of ADCs is configured to generate a second of the plurality of sampled signals by sampling a second of the plurality of instances of the analog input signal at a second sampling rate that is different than the first sampling rate according to a second clock frequency that is different than the first clock frequency, and
- processing circuitry coupled to the data converter, the processing circuitry to:
- normalize at least one signal that is based on at least one of the plurality of sampled signals to obtain, from at least the plurality of sampled signals, a plurality of common-bandwidth signals, wherein each of the plurality of common-bandwidth signals is based on at least a corresponding one of the plurality of sampled signals;
- and
- perform a common-mode filtering operation, based on information from the plurality of common-bandwidth signals, to produce a digital output signal.
Dependencies are inferred from the claim text.