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US 2022/0138044 A1Published application
Method and apparatus for error correction encoding compressed data
AssigneeSage Microelectronics Corp.
InventorsJianjun Luo, Hailuan Liu, Huayue Chen, Chris Tsu
Life of this patent
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Abstract
Designs of controllers for flash memory array are described. A controller is designed to form data packs of a predefined size with compressed data segments in different sizes. The data packs are encoded with ECC in two dimensions. When the data packs are read out, the ECC is applied in two dimensions, possibly repeated, to detect and correct errors that can be corrected by the ECC.
Claims20
An apparatus for storing compressed data, the apparatus comprising:
- an interface for receiving a data stream from a host device;
- a memory space for maintaining a set of firmware and one or more mapping tables;
- a processor, coupled to the memory space, executing the firmware to perform operations of:
- compressing the data stream into a plurality of data segments in accordance with a compression algorithm, wherein the data segments are in different lengths;
- forming a plurality of data packs in a predefined first length with the data segments, wherein the data packs are in two dimensions;
- and
- encoding each of the data packs with a first predefined Error Correcting Code (ECC) scheme along a first dimension.
4 more elements
A method for storing compressed data, the method comprising:
- receiving a data stream from an interface communicating with a host device;
- compressing the data stream into a plurality of data segments in accordance with a compression algorithm, wherein the data segments are in different lengths;
- forming a plurality of data packs in a predefined first length with the data segments, wherein the data packs are in two dimensions;
- and
- encoding each of the data packs with a first predefined Error Correcting Code (ECC) scheme along a first dimension.
2 more elements
Dependencies are inferred from the claim text.