Neural network apparatus

Abstract

A neural network apparatus includes: a plurality of memory cells each comprising a variable resistance element and a first transistor; a plurality of bit lines extending in a first direction; and a plurality of word lines extending in a second direction, crossing the bit lines and respectively connected to the first transistor of the plurality of memory cells; a plurality of sub-column circuits each comprising memory cells of the memory cells connected in parallel along the first direction; and a column circuit comprising two or more of the sub-column circuits connected in series along the second direction, wherein, when a neural network operation is performed, the column circuit outputs a summation current to a bit line connected to the column circuit based on voltage applied to the plurality of word lines.

Dependencies are inferred from the claim text.