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US 2022/0113694 A1Published application
Systems and methods to reduce voltage guardband
AssigneeIntel Corporation
InventorsMahesh K. Kumashikar, MD Altaf Hossain, Mahesh A. Iyer, Yuet Li, Atul Maheshwari, Ankireddy Nalamalpu
Life of this patent
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Abstract
Systems or methods of the present disclosure may provide efficient power consumption for programmable logic devices based on reducing guardband voltages. A programmable logic device may include circuit monitors to mimic critical paths of an implemented circuit design and generate timing information based on the critical paths. A controller on the programmable logic device may adjust the voltage guardband based on the timing information.
Claims20
A system, comprising:
- a processor that:
- receives a circuit design;
- identifies one or more critical paths based on the circuit design;
- identifies one or more unused portions of programmable logic of a programmable logic device based on the circuit design;
- generates one or more circuit monitors that mimic the one or more critical paths;
- and
- compiles the circuit design and the one or more circuit monitors into configuration data, wherein the configuration data is transmitted to the programmable logic device;
- and
- the programmable logic device comprising a controller that:
- programs a plurality of programmable logic elements to implement the configuration data, wherein the one or more unused portions of the programmable logic for the circuit design are programmed to implement the one or more circuit monitors;
- and
- adjusts a voltage guardband of the programmable logic device based on the one or more circuit monitors.
9 more elements
A programmable logic device, comprising:
- a first plurality of programmable logic elements that implement a circuit design;
- a second plurality of programmable logic elements that implements a circuit monitor comprising a flip-flop to monitor at least a portion of a critical path of the circuit design, wherein the circuit monitor generates timing information associated with the critical path;
- and
- a controller that:
- receives the timing information;
- and
- adjusts a voltage guardband based on the timing information.
4 more elements
A method, comprising:
- configuring a programmable logic device, comprising:
- programming a first plurality of programmable logic elements of the programmable logic device to implement a circuit design;
- and
- programming a second plurality of programmable logic elements of the programmable logic device to implement a circuit monitor to emulate a critical path in the circuit design;
- monitoring operation of the programmable logic device using the emulated critical path wherein monitoring indicates that the first or second plurality of programmable logic elements have aged;
- and
- moving the implementation of the circuit design from the first plurality of logic elements to a third plurality of logic elements based on the monitoring.
4 more elements
Dependencies are inferred from the claim text.