Hardware platform based on fpga partial reconfiguration for wireless communication device
AssigneeTelefonaktiebolaget LM Ericsson (publ)
InventorGang Zou
Life of this patent
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Abstract
Systems and methods are disclosed herein that relate to partially reconfiguring a Field Programmable Gate Array (FPGA) of a wireless communication device to provide time-slicing of modem and application functionality. In this manner, a low-cost, small size, and low power consumption implementation of the FPGA and thus the wireless communication device is provided.
Claims26
A method for partially reconfiguring a Field Programmable Gate Array, FPGA, that provides processing functionality for a wireless communication device, comprising:
- determining that a first triggering event for partially reconfiguring the FPGA to provide modem functionality has occurred, the modem functionality being functionality related to transmitting and/or receiving signals via a radio frequency transmit and/or receive circuitry that is external to the FPGA;
- upon determining that the first triggering event for partially reconfiguring the FPGA to provide modem functionality has occurred, loading a modem bit file into a reconfiguration partition of the FPGA, the modem bit file programming the reconfiguration partition of the FPGA to provide the modem functionality;
- after loading the modem bit file into the reconfiguration partition of the FPGA, determining that a second triggering event for partially reconfiguring the FPGA to provide application functionality, rather than the modem functionality, has occurred;
- and
- upon determining that the second triggering event for partially reconfiguring the FPGA to provide application functionality, rather than the modem functionality, has occurred, loading an application bit file into the reconfiguration partition of the FPGA, the application bit file programming the reconfiguration partition of the FPGA to provide the application functionality.
A wireless communication device for operation in a wireless communication network, comprising:
- radio frequency transmit and/or receive circuitry;
- one or more sensors;
- non-volatile memory storing a modem bit file and an application bit file;
- and
- a Field Programmable Gate Array, FPGA;
- wherein a controller is operable to:
- determine that a first triggering event for partially reconfiguring the FPGA to provide modem functionality has occurred, the modem functionality being functionality related to transmitting and/or receiving signals via the radio frequency transmit and/or receive circuitry;
- upon determining that the first triggering event for partially reconfiguring the FPGA to provide modem functionality has occurred, load the modem bit file from the non-volatile memory into a reconfiguration partition of the FPGA, the modem bit file programming the reconfiguration partition of the FPGA to provide the modem functionality;
- after loading the modem bit file into the reconfiguration partition of the FPGA, determine that a second triggering event for partially reconfiguring the FPGA to provide application functionality, rather than the modem functionality, has occurred;
- and
- upon determining that the second triggering event for partially reconfiguring the FPGA to provide application functionality, rather than the modem functionality, has occurred, load the application bit file from the non-volatile memory into the reconfiguration partition of the FPGA, the application bit file programming the reconfiguration partition of the FPGA to provide the application functionality.
Dependencies are inferred from the claim text.