Direct digital sequence detection and equalization
AssigneeRambus Inc.
InventorsMasum Hossain, Maruf H. Mohammad
Life of this patent
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Abstract
Methods and apparatuses for direct sequence detection can receive an input signal over a communication channel. Next, the input signal can be sampled based on a clock signal to obtain a sampled voltage. A set of reference voltages can be generated based on a main cursor, a set of pre-cursors, and a set of post-cursors associated with the communication channel. Each generated reference voltage in the set of reference voltages can correspond to a particular sequence of symbols. A sequence corresponding to the sampled voltage can be selected based on comparing the sampled voltage with the set of reference voltages.
Claims21
1-18. (canceled)
An integrated circuit (IC), comprising:
- a first circuit to generate a set of symbol sequences based on a first set of outputs, wherein the first set of outputs is generated by a first set of comparators based on an input signal and a first set of reference voltages;
- a second circuit to generate a set of probabilities based on a second set of outputs, wherein the second set of outputs is generated by a second set of comparators based on the input signal and a second set of reference voltages, wherein the second set of reference voltages are generated based on the first set of outputs and the first set of reference voltages;
- and
- a third circuit to select a symbol sequence from the set of symbol sequences based on the set of probabilities.
A receiver, comprising:
- a first circuit to generate a sampled voltage based on sampling an input signal received over a communication channel;
- a second circuit to generate a set of symbol sequences based on a first set of outputs, wherein the first set of outputs is generated by a first set of comparators based on the sampled voltage and a first set of reference voltages;
- a third circuit to generate a set of probabilities based on a second set of outputs, wherein the second set of outputs is generated by a second set of comparators based on the sampled voltage and a second set of reference voltages, wherein the second set of reference voltages are generated based on the first set of outputs and the first set of reference voltages;
- and
- a fourth circuit to select a symbol sequence from the set of symbol sequences based on the set of probabilities.
A method, comprising:
- generating a set of symbol sequences based on a first set of outputs, wherein the first set of outputs is generated by a first set of comparators based on an input signal and a first set of reference voltages;
- generating a set of probabilities based on a second set of outputs, wherein the second set of outputs is generated by a second set of comparators based on the input signal;
- and
- selecting, by a circuit, a symbol sequence from the set of symbol sequences based on the set of probabilities and a second set of reference voltages, wherein the second set of reference voltages are generated based on the first set of outputs and the first set of reference voltages.
Dependencies are inferred from the claim text.