Usb battery charging mode advertising and differentiation

A device, comprising:

• a connector having first and second connector pins;
• a switch coupled between the first connector pin and a resistor coupled to ground, the resistor having a resistance of 14.25 to 24.8 kiloohms;
• a circuit having a circuit input and a circuit output, the circuit input coupled to the second connector pin, the circuit configured to provide at the circuit output a true value based on a voltage on the second connector pin being equal to or greater than 0.8 to 2.0 Volts (V), and provide at the circuit output a false value otherwise;
• and
• a control circuit having first and second control circuit inputs and first and second control circuit outputs, the first control circuit input coupled to the circuit output, the first control circuit output configured to actuate the switch, the control circuit configured to make a charging port mode determination, including by:
• receiving a data contact detect (DCD) Complete signal on the second control circuit input;
• closing the switch to couple the first connector pin to ground through the resistor, responsive to receiving the DCD Complete signal;
• determining a value of a condition, the condition having a true value if the circuit output is a true value, the condition having a false value otherwise;
• opening the switch;
• sending a first signal on the second control circuit output, the first signal configured to indicate that the device is coupled to a dedicated charging port (DCP) of Divider 0 mode, responsive to determining that the condition is true;
• and
• sending a second signal on the second control circuit output, the second signal configured to indicate that the device is coupled to a DCP of Divider 1.2V short mode, responsive to determining that the condition is false.

A system, comprising:

• a connector having first and second connector pins;
• a switch coupled between the first connector pin and a resistor coupled to ground, the resistor having a resistance of 14.25 to 24.8 kiloohms;
• a circuit having a circuit input and a circuit output, the circuit input coupled to the second connector pin, the circuit configured to provide at the circuit output a true value based on a voltage on the second connector pin being equal to or greater than 0.8 to 2.0 Volts (V), and provide at the circuit output a false value otherwise;
• and
• a control circuit having first and second control circuit inputs and first and second control circuit outputs, the first control circuit input coupled to the circuit output, the first control circuit output configured to actuate the switch, the control circuit configured to make a charging port mode determination, including by:
• receiving a data contact detect (DCD) Complete signal on the second control circuit input;
• closing the switch to couple the first connector pin to ground through the resistor, responsive to receiving the DCD Complete signal;
• determining a value of a condition, the condition having a true value if the circuit output is a true value, the condition having a false value otherwise;
• opening the switch;
• sending a first signal on the second control circuit output, the first signal configured to indicate that the system is coupled to a dedicated charging port (DCP) of Divider 0 mode, responsive to determining that the condition is true;
• and
• sending a second signal on the second control circuit output, the second signal configured to indicate that the system is coupled to a DCP of Divider 1.2V short mode, responsive to determining that the condition is false.

A method, comprising:

• providing a voltage of 2.7 Volts (V) on each of a D+ data pin and a D− data pin of a Universal Serial Bus (USB) connector;
• waiting for a voltage on the D− data pin to drop below 2.32V, for a period longer than 500 microseconds (μs);
• removing the voltage of 2.7V from each of the D+ and D− data pins;
• sinking a current of 25-175 microamps (μA) from the D− data pin to ground for a period of at least 20 μs;
• determining a condition, the condition having a true value if a voltage on the D+ data pin is greater than 0.25-0.4V and less than 0.8-2.0V, the condition having a false value otherwise;
• waiting for the D+ data pin to have a voltage less than VLGC, responsive to determining that the condition is false;
• and
• providing the voltage of 2.7V on each of the D+ and D− data pins.

A device, comprising:

• a USB connector having a D+ data pin and a D− data pin;
• a first switch coupled between the D+ data pin and a resistor coupled to a voltage source of 2.7 Volts (V), the resistor having a resistance of 30 kiloohms (kΩ);
• a second switch coupled between the D− data pin and a resistor coupled to the voltage source of 2.7V, the resistor having a resistance of 30 kΩ;
• a third switch coupled between the D+ data pin and a current sink configured to sink a current of 25-175 microamps (μA);
• a first circuit having a first circuit input and a first circuit output, the first circuit input coupled to the D+ data pin, the first circuit configured to provide at the first circuit output a true value based on a voltage on the D+ data pin being equal to or greater than 0.25-0.4V, and provide at the first circuit output a false value otherwise;
• a second circuit having a second circuit input and a second circuit output, the second circuit input coupled to the D+ data pin, the second circuit configured to provide at the second circuit output a true value based on a voltage on the D+ data pin being equal to or greater than 0.8-2.0V, and provide at the second circuit output a false value otherwise;
• a third circuit having a third circuit input and a third circuit output, the third circuit input coupled to the D− data pin, the third circuit configured to provide at the third circuit output a true value based on a voltage on the D− data pin being equal to or greater than 2.25-2.39V, and provide at the third circuit output a false value otherwise;
• and
• a control circuit having first, second and third control circuit inputs and first, second and third control circuit outputs, the first control circuit input coupled to the first circuit output, the second control circuit input coupled to the second circuit output, the third control circuit input coupled to the third circuit output, the first control circuit output configured to actuate the first switch, the second control circuit output configured to actuate the second switch, and the third control circuit output configured to actuate the third switch, the control circuit configured to:
• close the first switch and the second switch;
• determine a first condition, the first condition having a true value if the third circuit output is false for a period longer than 500 microseconds (μs), the first condition having a false value otherwise;
• open the first switch and the second switch and close the third switch for a period of at least 20 μs, responsive to determining that the first condition is true;
• determine a second condition, the second condition having a true value if the first circuit output is true and the second circuit output is false, the second condition having a false value otherwise;
• wait for a third condition to be false, the third condition having a true value if the second circuit output is true, the third condition having a false value otherwise, responsive to the second condition being false;
• and
• close the first switch and the second switch, responsive to the third condition being false.

A system, comprising:

• a USB connector having a D+ data pin and a D− data pin;
• a first switch coupled between the D+ data pin and a resistor coupled to a voltage source of 2.7 Volts (V), the resistor having a resistance of 30 kiloohms (kΩ);
• a second switch coupled between the D− data pin and a resistor coupled to the voltage source of 2.7V, the resistor having a resistance of 30 kΩ;
• a third switch coupled between the D+ data pin and a current sink configured to sink a current of 25-175 microamps (μA);
• a first circuit having a first circuit input and a first circuit output, the first circuit input coupled to the D+ data pin, the first circuit configured to provide at the first circuit output a true value based on a voltage on the D+ data pin being equal to or greater than 0.25-0.4V, and provide at the first circuit output a false value otherwise;
• a second circuit having a second circuit input and a second circuit output, the second circuit input coupled to the D+ data pin, the second circuit configured to provide at the second circuit output a true value based on a voltage on the D+ data pin being equal to or greater than 0.8-2.0V, and provide at the second circuit output a false value otherwise;
• a third circuit having a third circuit input and a third circuit output, the third circuit input coupled to the D− data pin, the third circuit configured to provide at the third circuit output a true value based on a voltage on the D− data pin is equal to or greater than 2.25-2.39V, and provide at the third circuit output a false value otherwise;
• and
• a control circuit having first, second and third control circuit inputs and first, second and third control circuit outputs, the first control circuit input coupled to the first circuit output, the second control circuit input coupled to the second circuit output, the third control circuit input coupled to the third circuit output, the first control circuit output configured to actuate the first switch, the second control circuit output configured to actuate the second switch, and the third control circuit output configured to actuate the third switch, the control circuit configured to:
• close the first switch and the second switch;
• determine a first condition, the first condition having a true value if the third circuit output is false for a period longer than 500 microseconds (μs), the first condition having a false value otherwise;
• open the first switch and the second switch and close the third switch for a period of at least 20 μs, responsive to determining that the first condition is true;
• determine a second condition, the second condition having a true value if the first circuit output true and the second circuit output is false, the second condition having a false value otherwise;
• wait for a third condition to be false, the third condition having a true value if the second circuit output is true, the third condition having a false value otherwise, responsive to the second condition being false;
• and
• close the first switch and the second switch, responsive to the third condition being false.