LDMOS transistor having vertical floating field plate and manufacture fhereof

A method for manufacturing a LDMOS transistor having a floating VFP, comprising:

• providing a semiconductor substrate, wherein the semiconductor substrate comprises a first conductivity type doping region;
• forming a second conductivity type well region in the first conductivity type doping region;
• forming a floating VFP, wherein the floating VFP extends vertically from the first conductivity type doping region and along its surface, wherein the floating VFP comprises a floating polysilicon layer and a laminated structure, the laminated structure comprises a stack of alternate layers of insulating material and ferroelectric material, and in the laminated structure an outermost layer and an innermost layer are the insulating material;
• forming a gate structure, a source region and a drain region, wherein the source region is located in the second conductivity type well region, the drain region is located in the first conductivity type doping region, and the gate structure contacts to the source region, the second conductivity type well region and the first conductivity type doping region, and the floating VFP is between the second conductivity type well region and the drain region.