Low resistance approaches for fabricating contacts and the resulting structures

An integrated circuit structure, comprising:

• a semiconductor structure above a substrate;
• a gate electrode over the semiconductor structure, the gate electrode defining a channel region in the semiconductor structure;
• a first semiconductor source or drain structure at a first end of the channel region at a first side of the gate electrode;
• a second semiconductor source or drain structure at a second end of the channel region at a second side of the gate electrode, the second end opposite the first end;
• and
• a source or drain contact directly on the first or second semiconductor source or drain structure, the source or drain contact comprising a non-selective epitaxial layer, a barrier layer and an inner conductive structure.

A computing device, comprising:

• a board;
• and
• a component coupled to the board, the component including an integrated circuit structure, comprising:
• a semiconductor structure above a substrate;
• a gate electrode over the semiconductor structure, the gate electrode defining a channel region in the semiconductor structure;
• a first semiconductor source or drain structure at a first end of the channel region at a first side of the gate electrode;
• a second semiconductor source or drain structure at a second end of the channel region at a second side of the gate electrode, the second end opposite the first end;
• and
• a source or drain contact directly on the first or second semiconductor source or drain structure, the source or drain contact comprising a barrier layer and an inner conductive structure, wherein the barrier layer is metal nitride barrier layer or a metal carbide barrier layer.

A computing device, comprising:

• a board;
• and
• a component coupled to the board, the component including an integrated circuit structure, comprising:
• a semiconductor structure above a substrate;
• a gate electrode over the semiconductor structure, the gate electrode defining a channel region in the semiconductor structure;
• a first semiconductor source or drain structure at a first end of the channel region at a first side of the gate electrode;
• a second semiconductor source or drain structure at a second end of the channel region at a second side of the gate electrode, the second end opposite the first end;
• and
• a source or drain contact directly on the first or second semiconductor source or drain structure, the source or drain contact comprising, a non-selective epitaxial layer, a barrier layer and an inner conductive structure.